Spiking Neural Inference Memory Replay for Extended State Retention
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Solution Overview
Problem
Spiking neural processors face challenges in retaining neural network state information due to short memory retention times, leading to increased chip area, power consumption, and limited inference window size when interfaced with sensors that sample at rates much slower than the processor can maintain state.
Innovation Solution
Implement a storage unit to record and replay neuron output signals during periods of inactivity, using a 'forget-and-remember' strategy, which stores data indicative of the neural network state during active periods and outputs it during subsequent activity, coordinated with an input buffer circuit to manage data recording and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If large memory buffers are used to retain neural network state information, then the inference window size can be increased, but chip area and power consumption increase significantly
Solution Approach 1:
The patent divides the memory retention function into two segments: (1) analog memory elements (capacitors) retain state information for short durations during active processing, and (2) digital memory buffers retain state information for long durations during inactive periods. This segmentation allows each memory type to operate in its optimal regime, reducing the need for large analog memory buffers while maintaining extended inference windows.
Solution Approach 2:
The patent implements periodic sampling of neural network state information at specific time intervals (e.g., at the beginning and end of inference windows). Instead of continuously retaining state information in large buffers, the system periodically captures and stores state snapshots, reducing memory requirements while preserving essential temporal information for extended inference operations.
2Area of stationary object
If analog memory elements are designed to retain state information for short time windows, then chip area and power consumption are reduced, but the system cannot interface with sensors that sample at slower rates
Solution Approach 1:
The patent introduces digital memory buffers as intermediary components between the analog neural network processing elements and external sensors. These buffers act as a bridge, capturing state information from the analog network and holding it until sensor data is ready, thereby enabling interface with sensors that operate at different sampling rates without requiring the analog memory to extend its retention time.
Solution Approach 2:
The patent creates digital copies of the neural network state information (membrane potentials, synaptic weights) and stores these copies in digital memory buffers. This copying allows the original analog network to operate with short-term memory characteristics while the digital copies preserve state information for extended periods, enabling compatibility with slower sensors without increasing analog memory requirements.
3Duration of action of moving object
If large memory buffers are used to retain neural network state information, then the inference window size can be increased, but power consumption increases significantly
Solution Approach 1:
The patent segments the memory retention function between energy-efficient digital memory buffers (for long-term storage during inactive periods) and analog memory elements (for short-term retention during active processing). This segmentation allows the system to achieve extended inference windows without requiring large amounts of power-consuming analog memory, as the digital buffers consume minimal power when holding data statically.
Solution Approach 2:
The patent employs periodic sampling and updating of state information in memory buffers only when necessary (at transition points between active and inactive periods). Instead of continuously power-ing large memory buffers to maintain state information, the system periodically refreshes and transfers data between analog and digital memory, significantly reducing average power consumption while maintaining extended inference capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces memory requirements and power consumption while maintaining inference accuracy by allowing the neural network to recall previous state information, thus enhancing performance in resource-constrained systems.
Implementation Method 1
Analog neurons utilize analog memory elements, such as capacitors, to accumulate spikes and retain temporal neural network state information between spikes
Data Source
AI summary
A spiking neural processor configured to receive one or more input signals and generate one or more inference output signals. The spiking neural processor comprises a plurality of neurons interconnected by a plurality of synaptic elements to form a spiking neural network. A portion of the neurons are connected to receive the input signals and each of the neurons is configured to generate a neuron output signal. The spiking neural processor also comprises a storage unit connected to receive one or more of the neuron output signals from a selected subset of the neurons, and one or more augmented input circuits connected by the synaptic elements to selected ones of the neurons. The storage unit is configured to store data indicative of the received neuron output signals, and output at least a portion of the stored data after a predetermined delay. The augmented input circuits are connected to receive the stored data outputted by the storage unit after the predetermined delay.