Spin Torque Majority Gate Device with Shared PMA Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The fabrication of spin torque majority gate (STMG) devices with top-pinned magnetic tunnel junctions (MTJs) faces challenges due to etch process limitations, which can damage the non-magnetic spacer layer and interface, leading to loss of perpendicular magnetic anisotropy (PMA) and tunnel magneto resistance (TMR), resulting in non-functional devices.
Innovation Solution
A majority gate device design featuring a bulk PMA layer and seed layer shared among input and output zones, with a magnetic layer and interface layer optimized for ferromagnetic coupling, allowing for patterning techniques compatible with CMOS manufacturing and enabling scalable, thermally stable, and reliable switching behavior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If top-pinned MTJs are used with a thin non-magnetic spacer layer to enable freestanding common free layer, then scalability for smaller feature sizes is improved, but the etch process damages the spacer layer and interface, causing loss of PMA and TMR
Solution Approach 1:
A protective capping layer is introduced as an intermediary element between the etch process and the non-magnetic spacer layer. This capping layer serves as a buffer that absorbs the harmful effects of the etch process, preventing direct damage to the spacer layer and interface while allowing the etch to proceed for patterning the magnetic layers above.
Solution Approach 2:
The non-magnetic spacer layer is pre-formed with precise thickness control before the magnetic layers are deposited and patterned. This preliminary formation ensures that the spacer layer achieves its optimal thickness for enabling freestanding common free layer while protecting it from subsequent processing damage through the use of a capping layer.
2Length of moving object
If the non-magnetic spacer layer is made thinner to improve scalability, then device scaling is enhanced, but the spacer layer becomes more susceptible to etch damage
Solution Approach 1:
The capping layer acts as a protective intermediary that shields the thin non-magnetic spacer layer from etch damage. This allows the spacer layer to maintain its thin dimensions for improved scalability while the capping layer absorbs the mechanical and chemical stress of the etching process.
Solution Approach 2:
The capping layer is deposited beforehand to provide a protective cushion over the thin non-magnetic spacer layer. This pre-established protective layer prevents etch species from penetrating and damaging the spacer layer, enabling the use of thinner spacers without compromising device reliability.
3Ease of manufacture
If etch species penetrate the non-magnetic spacer layer to pattern the magnetic layers, then patterning is achieved, but PMA and TMR are lost due to interface damage
Solution Approach 1:
The capping layer serves as a protective intermediary that allows the etch process to pattern the magnetic layers above while preventing etch species from penetrating through to the non-magnetic spacer layer and interface. This maintains interface quality and preserves PMA and TMR properties.
Solution Approach 2:
The potential harm of etch species penetrating the spacer layer is converted into a benefit by using the capping layer as a sacrificial protective element. The capping layer is designed to be etched away or damaged instead of the spacer layer, transforming the harmful etch penetration into a controlled process that protects the critical interface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables scalable STMG devices with improved thermal stability, reliable switching, and compatibility with current manufacturing technologies, allowing for compact logic circuits and three-dimensional stacking, while maintaining high tunnel magneto resistance and effective anisotropy.
Implementation Method 1
a bulk PMA layer on a seed layer; on the bulk PMA layer a magnetic layer being in contact with the non-magnetic layer
Implementation Method 2
a magnetic layer and interface layer optimized for ferromagnetic coupling
Implementation Method 3
The operation of the device is based on spin torque transfer
Implementation Method 4
a non-magnetic layer sandwiched in between a free layer stack and a hard layer
Implementation Method 5
The state of magnetization is detected by measuring the tunnel magnetoresistance (TMR) between the free 202 and the fixed layers 2191 by the output pillar 219
Data Source
AI summary
The disclosed technology relates generally to magnetic devices, and more particularly to spin torque majority gate devices such as spin torque magnetic devices (STMG), and to methods of fabricating the same. In one aspect, a majority gate device includes a plurality of input zones and an output zone. A magnetic tunneling junction (MTJ) is formed in each of the input zones and the output zone, where the MTJ includes a non-magnetic layer interposed between a free layer stack and a hard layer. The free layer stack in turn includes a bulk perpendicular magnetic anisotropy (PMA) layer on a seed layer, a magnetic layer formed on and in contact with the bulk PMA layer, and a non-magnetic layer formed on the magnetic layer. Each of the bulk PMA layer and the seed layer is configured as a common layer for each of the input zones and the output zone.