Split-Die ECC Memory Layout for DRAM Capacity and Reliability

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Solution Overview

Problem

The existing DRAM chip designs allocate storage space for error correcting codes (ECC), reducing the available data capacity and inefficiently utilize ECC resources due to unpredictable soft errors across partitions.

Innovation Solution

Implementing a first memory for data storage and a second memory for ECC in separate dies, allowing flexible allocation of ECC resources based on actual requirements, thereby optimizing data protection and capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If independent ECC partitions are configured in the DRAM chip to protect data from soft errors, then data reliability is improved, but the available data capacity in the DRAM chip is reduced

Engineering Contradiction:
Improvedata reliabilityVSAvoidavailable data capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides the ECC storage function into a separate component. Instead of having ECC partitions integrated within the DRAM die, the patent uses an external ECC memory device (such as an SRAM die or separate memory device) to store error correcting codes. This segmentation allows the DRAM chip to maintain full capacity for data storage while the external device handles ECC storage, thus resolving the contradiction between reliability and available capacity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If ECC partitions are evenly deployed near DRAM partitions on the same die, then data protection coverage is improved, but the DRAM chip area occupied by ECC partitions increases

Engineering Contradiction:
Improvedata protection coverageVSAvoidECC storage area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the ECC storage function from the DRAM die and places it in a separate external memory device. This extraction eliminates the need for ECC partitions to be physically deployed on the DRAM chip, thereby removing the area occupation problem while maintaining data protection coverage through the external ECC storage.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If ECC partitions are configured for all data partitions, then data protection comprehensiveness is improved, but the utilization of ECC storage resources becomes inefficient

Engineering Contradiction:
Improvedata protection comprehensivenessVSAvoidECC resource utilization efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a dynamic ECC allocation mechanism where the external ECC memory device can flexibly allocate error correcting codes to different DRAM partitions based on actual soft error occurrences and protection needs. This dynamic approach allows the system to provide comprehensive data protection when needed while avoiding unnecessary ECC storage allocation for partitions that do not require it, thus improving ECC resource utilization efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12554577B2Storage apparatus, storage control apparatus, and system on chip
Publication Date: 2026.02.17 HUAWEI TECH CO LTD
  • US12554577B2 patent drawing
  • US12554577B2 patent drawing
  • US12554577B2 patent drawing

AI summary

A storage apparatus includes a first memory disposed in a first die and configured to store data, a second memory disposed in a second die and configured to store an error correcting code corresponding to the data. The error correcting code may be used to perform data protection on the data. A storage controller is configured to write the data into the first memory, and read the data from the first memory.