Split-Domain Input Buffer Circuit for SOA-Safe High-Voltage I/O

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Solution Overview

Problem

Low voltage devices used in high voltage domains face Safe Operating Area (SOA) violations due to the need to transmit and receive data at higher voltages, leading to increased pin leakage when resistive voltage dividers are employed.

Innovation Solution

An input buffer circuit with separate high and low input voltage domains, utilizing a signal splitter and combiner circuit to independently control voltage levels, and a level shifter to downshift high voltage signals, preventing SOA violations without the need for resistive voltage dividers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If low voltage devices are used in high voltage domains to achieve high speed and low area, then speed and area are improved, but Safe Operating Area violations occur due to high voltage exposure

Engineering Contradiction:
Improvedata transmission speedVSAvoidSafe Operating Area compliance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The input buffer circuit is segmented into two independent voltage domains: a high voltage domain (VIH) for receiving high voltage signals and a low voltage domain (VIL) for processing signals at safe voltage levels. The signal path is divided such that high voltage signals are split into upper and lower portions, with only the lower portion directly connected to low voltage devices, preventing SOA violations while maintaining high speed operation.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a resistive voltage divider is used to step down pad voltage to protect low voltage devices, then voltage protection is achieved, but pin leakage increases

Engineering Contradiction:
Improvevoltage protectionVSAvoidpin leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The harmful resistive voltage divider is extracted and removed from the circuit. Instead, the patent directly connects the lower portion of the split high voltage signal to the low voltage domain through carefully designed buffer circuits, achieving voltage protection without the leakage penalties of resistive dividers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Buffer circuits act as intermediaries between the high voltage domain and low voltage domain. These buffers translate and isolate voltage levels without requiring resistive dividers, preventing direct high voltage exposure to low voltage devices while minimizing leakage current.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If high voltage is used for I/O buffers to transmit and receive data, then voltage compatibility is improved, but low voltage devices suffer SOA violations

Engineering Contradiction:
Improvevoltage compatibilityVSAvoiddevice operation safety
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a voltage domain dimension by creating separate high voltage (VIH) and low voltage (VIL) domains. High voltage compatibility is achieved in the VIH domain for signal reception, while the VIL domain maintains safe operating conditions for low voltage devices through controlled signal routing and level shifting.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12615047B2Input buffer circuit having a signal splitter and combiner circuit
Publication Date: 2026.04.28 NXP USA INC
  • US12615047B2 patent drawing
  • US12615047B2 patent drawing
  • US12615047B2 patent drawing

AI summary

An input circuit receives an input voltage and generates a digital output. A first signal splitter generates a lower signal which tracks the input voltage in a range of a first voltage level and a second voltage level and provides a first control signal based on the upper signal. A second signal splitter generates an upper signal which tracks the input voltage in a range of the second voltage level and a third voltage level and provides at least one control signal based on the upper signal. The third voltage level is greater than the second voltage level which is greater than the first voltage level. A level shifter receives the at least one control signal from the second signal splitter and provides a third control signal, and a combiner circuit generates the digital output as a logical combination of the first and third controls signals.