Split Doped Gate Structure for High Voltage Lateral Transistors
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Solution Overview
Problem
Conventional techniques for reducing gate to drain capacitance (Cgd) in lateral double-diffused transistors result in increased drain-to-source on-resistance (Rdson), which decreases switching speed in high voltage applications.
Innovation Solution
The method involves forming a substrate with a source and drain region, where the gate is implanted with doped portions of different dopant concentrations, and a drift well is created between the gate and drain, allowing for a split doped gate structure that minimizes poly depletion effects and reduces Cgd without increasing the gate overlap region, thereby enhancing switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If conventional techniques are used to reduce gate to drain capacitance (Cgd), then Cgd is reduced, but drain-to-source on-resistance (Rdson) increases
Solution Approach 1:
The gate is divided into two regions with different doping concentrations: a first gate region with higher dopant concentration and a second gate region with lower dopant concentration. This local differentiation allows the first gate region to provide strong field control for low on-resistance while the second gate region reduces overlap capacitance, thereby simultaneously improving both Rdson and Cgd characteristics.
Solution Approach 2:
The gate structure is segmented into multiple doped portions with different dopant concentrations rather than using a uniform doping approach. This segmentation enables independent optimization of different gate regions to address the conflicting requirements of low on-resistance and low capacitance.
2Shape
If conventional techniques are used to reduce gate to drain capacitance (Cgd), then Cgd is reduced, but switching speed decreases
Solution Approach 1:
The differentiated doping concentrations in different gate regions enable the device to achieve low Cgd while maintaining fast switching speed. The first gate region with higher doping provides strong control for fast switching, while the second gate region with lower doping reduces capacitance, thus resolving the contradiction between Cgd reduction and switching speed maintenance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces gate to drain capacitance effectively, improving switching speed without compromising drive current or increasing on-resistance, thus enabling faster switching in high voltage applications.
Implementation Method 1
The gate comprises one or more doped portions with different dopant concentrations
Data Source
AI summary
A method of forming a device is presented. The method includes providing a substrate having a device region which includes a source region, a gate and a drain region defined thereon. The method also includes implanting the gate. The gate comprises one or more doped portions with different dopant concentrations. A source and a drain are formed in the source region and drain region. The drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate.