Split Gate Memory Insulation via Rounded Control Gate and Retreated Sidewall
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The proximity of control gate and memory gate electrodes in split gate type nonvolatile memory devices using MONOS films leads to a risk of short-circuit failure and leakage current, reducing manufacturing yield and performance.
Innovation Solution
A semiconductor device structure where the control gate and memory gate electrodes are insulated by a lamination gate insulation film, with a rounded upper end corner of the control gate electrode and a retreated insulation film at the sidewall, preventing direct contact and enhancing insulation between the electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control gate electrode and memory gate electrode are placed adjacent to each other in a split gate type nonvolatile memory device, then the device can achieve nonvolatile memory functionality with excellent data holding reliability, but the proximity causes a risk of short-circuit failure and leakage current between the electrodes
Solution Approach 1:
An insulation film is introduced as an intermediary between the control gate electrode and memory gate electrode. This insulation film is formed to extend from the surface of the semiconductor substrate to a position overlapping with the control gate electrode when viewed in planar view, creating a physical barrier that prevents direct contact and eliminates the harmful short-circuit and leakage current effects while allowing the electrodes to remain adjacent for functional operation
2Productivity
If the control gate electrode and memory gate electrode are placed adjacent to each other, then the device structure is compact and efficient, but the manufacturing yield is reduced due to short-circuit failure risk
Solution Approach 1:
The insulation film is formed in advance before the control gate electrode is fully constructed. By forming the insulation film first and extending it to overlap with the control gate electrode position, the harmful short-circuit effect is prevented from occurring in the first place, thereby improving manufacturing yield without compromising electrode insulation reliability
Data Source
AI summary
A lamination pattern having a control gate electrode, a first insulation film thereover, and a second insulation film thereover is formed over a semiconductor substrate. A memory gate electrode is formed adjacent to the lamination pattern. A gate insulation film is formed between the control gate and the semiconductor substrate. A fourth insulation film, including a lamination film of a silicon oxide film, a silicon nitride film, and another silicon oxide film, is formed between the memory gate electrode and the semiconductor substrate and between the lamination pattern and the memory gate electrode. At the sidewall on the side of the lamination pattern adjacent to the memory gate electrode, the first insulation film is retreated from the control gate electrode and the second insulation film, and the upper end corner portion of the control gate electrode is rounded.