Split Gate Nonvolatile Memory Cells with Variable Gate Lengths
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Solution Overview
Problem
Conventional semiconductor devices with nonvolatile memory cells face challenges in achieving high operation speed, high rewrite cycle, and high reliability while maintaining a low production cost and short development period, particularly in meeting diverse application requirements such as in-vehicle applications.
Innovation Solution
The semiconductor device incorporates split gate type memory cells with memory gate electrodes of different lengths formed over the sidewall of control gate electrodes using a self-aligning technology, allowing for precise control of gate lengths and enabling the joint loading of memory cells with varying performance on a single chip, thereby enhancing operation speed, rewrite cycle, and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory cells with different gate lengths are formed to meet diverse application requirements, then adaptability is improved, but device complexity increases
Solution Approach 1:
The semiconductor substrate is divided into multiple regions, with each region containing memory cells having different gate lengths configured to meet specific application requirements. This segmentation allows different performance characteristics to be realized in different areas of the same chip without increasing overall device complexity
Solution Approach 2:
Different regions of the semiconductor substrate are assigned different gate length configurations tailored to local performance needs. By controlling the gate length of memory cells in each region according to specific application requirements, the invention achieves high adaptability while maintaining manageable device complexity through localized optimization
2Ease of manufacture
If conventional individually formed control gate electrode and memory gate electrode are used, then manufacturing ease is improved, but manufacturing precision deteriorates
Solution Approach 1:
The control gate electrode and memory gate electrode are formed as an integrated structure through a unified formation process. This merging approach enables precise control of the memory gate electrode length by the self-aligning effect, achieving high manufacturing precision while maintaining ease of manufacture through process integration
Solution Approach 2:
The control gate electrode is formed first as a preliminary structure that serves as a self-aligning reference for subsequent memory gate electrode formation. This preliminary action establishes the positional reference that enables precise memory gate electrode length control without requiring additional alignment steps
Data Source
AI summary
An object of the present invention is to provide a semiconductor device having a nonvolatile memory cell of a high operation speed and a high rewrite cycle and a nonvolatile memory cell of high reliability. In a split gate type nonvolatile memory in which memory gate electrodes are formed in the shape of sidewalls of control gate electrodes, it is possible to produce a memory chip having a memory of a high operation speed and a high rewrite cycle and a memory of high reliability at a low cost by jointly loading memory cells having different memory gate lengths in an identical chip.