Split-Gate Power MOSFET Fabrication Using Masked Thermal Oxidation
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Solution Overview
Problem
The thermal oxidation method used in manufacturing split-gate power MOSFETs causes diffusion of dopant ions, leading to ineffective isolation of the two separated gates, which limits the ability to tolerate high potentials in high-voltage applications.
Innovation Solution
A method involving the formation of a semiconductor layer with trenches, where a first thermal oxide layer is formed, followed by a first gate, and a CVD oxide layer, with a mask layer used to expose and thin the oxide layer, allowing for the formation of a second gate, effectively isolating the gates and preventing current leakage under high voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal oxidation method is used to form oxide layer, then oxide layer can be formed on trench surface, but dopant ions diffuse causing ineffective gate isolation
Solution Approach 1:
A mask layer is introduced as an intermediary between the thermal oxidation process and the gate structure. This mask layer prevents dopant ions from diffusing into the oxide layer during thermal oxidation, thereby maintaining effective gate isolation while still allowing the oxide layer to form properly on the trench surface.
Solution Approach 2:
The mask layer is formed preliminarily before the thermal oxidation process. This preliminary action of depositing the mask layer protects the subsequent oxide layer formation from dopant contamination, ensuring that the isolation effectiveness is maintained from the outset rather than requiring corrective measures later.
2Adaptability or versatility
If two separated gates are formed with different potentials, then channel formation and charge balance are achieved, but voltage tolerance is limited due to ineffective isolation
Solution Approach 1:
The mask layer acts as a disposable protective element that is used during the critical oxidation phase and then removed. This temporary structure enables the formation of properly isolated gates that can subsequently tolerate high voltages, while the mask itself is discarded after serving its protective function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the reliability of power MOSFETs by effectively isolating the gates, preventing current leakage, and increasing the voltage tolerance, thereby improving the device's performance in high-voltage applications.
Implementation Method 1
a first thermal oxide layer is formed on a surface of the first trench
Implementation Method 2
a first chemical vapor deposition (CVD) oxide layer is formed on the first gate in the first trench
Data Source
AI summary
A method of fabricating a power metal oxide semiconductor field effect transistor (MOSFET) is provided, and the method includes forming a semiconductor layer on a substrate, forming at least one first trench in the semiconductor layer, forming a thermal oxide layer on a surface of the trench, forming a first gate in the first trench, forming a chemical vapor deposition (CVD) oxide layer on the first gate in the first trench, forming a mask layer on the CVD oxide layer in the first trench so as to form a second trench between the mask layer and the thermal oxide layer, and forming a second gate in the second trench.


