Split Gate Power Transistor Reducing Gate Charge
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Solution Overview
Problem
Conventional power MOSFETs require high gate charge for switching, limiting their switching frequency and increasing the size and cost of discrete components in switch-mode power supplies, as the gate charge directly affects the speed of transistor switching and the efficiency of power conversion.
Innovation Solution
A split gate power transistor configuration is introduced, where a polysilicon layer is cut into two electrically isolated portions, with a gap separating the polysilicon gate and field plate, reducing gate capacitance and charge by approximately 50% through the removal of polysilicon over the transition region, allowing for faster switching and higher frequency operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional power MOSFET structure is used, then the transistor can provide sufficient current drive capability, but the gate charge is high which limits switching frequency
Solution Approach 1:
The gate structure is segmented into two separate gates (first gate and second gate) that are electrically isolated from each other. The first gate controls the channel formation while the second gate (field plate) extends over the transition region to control the electric field distribution. This segmentation allows independent optimization of each gate's function, reducing the total gate charge while maintaining current drive capability.
Solution Approach 2:
The polysilicon gate material is removed from overlying the transition region, retaining it only over the channel region. This extraction eliminates the unnecessary capacitance associated with the gate-to-drain overlap in the transition region, directly reducing gate charge by approximately 50% while preserving the essential current switching function.
2Quantity of substance
If polysilicon gate material is removed over the transition region, then gate charge is reduced by 50%, but the electric field control in the transition region may be compromised
Solution Approach 1:
The gate structure is divided into two segments: the first gate over the channel region provides strong electric field for carrier inversion, while the second gate (field plate) extends over the transition region to provide distributed electric field control. This segmentation ensures that each region receives appropriate electric field strength for its specific function.
Solution Approach 2:
The second gate (field plate) acts as an intermediary structure that distributes the electric field control function across the transition region. It mediates between the first gate's channel control and the drain region, providing gradual field termination and preventing field concentration that would compromise reliability.
3Ease of manufacture
If the gate structure is simplified to reduce complexity, then manufacturing becomes easier, but the ability to control switching speed and reduce gate charge is diminished
Solution Approach 1:
The gate is segmented into two electrically isolated portions, but both are formed using the same polysilicon deposition and patterning processes. The segmentation is achieved through selective etching and re-deposition steps that are standard in CMOS fabrication, maintaining ease of manufacture while enabling advanced functionality for faster switching.
Solution Approach 2:
The second gate extends in the lateral dimension over the transition region, creating a field plate structure that provides distributed control. This dimensional extension allows the gate to influence the electric field distribution across a larger area without requiring additional vertical layers, maintaining fabrication simplicity while enhancing switching performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The split gate configuration reduces gate charge by 50%, enabling faster switching and higher frequency operation while maintaining efficiency, leading to smaller, less expensive discrete components and improved power supply performance.
Implementation Method 1
When a voltage is applied between the gate and source terminals, the electric field generated penetrates through the gate oxide and creates a so-called 'inversion layer', or channel, at the semiconductor-insulator interface
Implementation Method 2
The gate terminal is separated from the channel in the substrate by the gate oxide
Data Source
AI summary
A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region of the substrate, and a second portion forming a polysilicon field plate formed over a portion of a transition region of the substrate. The two polysilicon portions are separated by a gap. A lightly doped region is implanted in the substrate below the gap, thereby forming a bridge having the same doping type as the substrate body. The field plate also extends over a field oxide filled trench formed in the substrate. The field plate is electrically coupled to a source of the split gate power transistor.


