Non-Planar I/O and Logic Transistors With Split Gate Workfunctions
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in independently controlling the performance of I/O and logic transistors on common substrates, as they typically share the same workfunction, limiting independent performance targeting without additional mask operations.
Innovation Solution
The approach involves using a carbon hardmask to differentiate etch rates between different transistor structures, allowing for the patterning of distinct workfunction metal layers for I/O and logic transistors, enabling independent control of their gate workfunctions without additional mask operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional processes are used to fabricate fin-FETs on common substrates, then manufacturing simplicity is maintained, but independent performance control of I/O and logic transistors is limited due to shared workfunction
Solution Approach 1:
The patent applies local quality by introducing a carbon hardmask layer selectively at specific gate electrode regions (I/O transistor regions) while leaving other regions (logic transistor regions) without the hardmask. This allows different workfunction metal layers to be patterned at different locations, enabling independent performance targeting of I/O and logic transistors through spatially differentiated processing rather than uniform treatment across the entire substrate.
Solution Approach 2:
The patent segments the gate electrode structure into distinct regions with different workfunction characteristics. By dividing the gate electrode into I/O transistor gate regions and logic transistor gate regions, and applying different workfunction metal layers to each segment, the patent enables independent optimization of each transistor type's performance while maintaining a unified fabrication process flow.
2Adaptability or versatility
If additional mask operations are performed to differentiate workfunctions, then independent performance targeting is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent employs preliminary action by forming the carbon hardmask layer at the I/O transistor gate electrode regions before the workfunction metal layer deposition step. This pre-positioning of the hardmask enables selective removal of workfunction metal at specific regions during subsequent processing, achieving differentiated workfunctions without requiring additional mask operations after metal deposition. The preliminary placement of the carbon hardmask simplifies the overall manufacturing sequence by consolidating patterning steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for independent performance targeting of I/O and logic transistors by differentiating their workfunctions, enhancing device performance without the need for extra mask operations, thereby optimizing device functionality on common substrates.
Implementation Method 1
using a carbon hardmask to differentiate etch rates between different transistor structures, allowing for the patterning of distinct workfunction metal layers
Data Source
Figure 1A~1B
Figure 2A~2C
Figure 2D~2F
AI summary
Non-planar I/O and logic semiconductor devices having different workfunctions on common substrates and methods of fabricating non-planar I/O and logic semiconductor devices having different workfunctions on common substrates are described. For example, a semiconductor structure includes a first semiconductor device disposed above a substrate. The first semiconductor device has a conductivity type and includes a gate electrode having a first workfunction. The semiconductor structure also includes a second semiconductor device disposed above the substrate. The second semiconductor device has the conductivity type and includes a gate electrode having a second, different, workfunction.