Split Path Sense Amplifier for Resistive Memory Read Margin
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Solution Overview
Problem
Portable computing devices face challenges in reducing power consumption while maintaining sensitivity to noise and manufacturing process variations, which affects the accuracy of memory devices using sense amplifiers.
Innovation Solution
A split path sense amplifier is introduced, which increases sensing margin by shifting a reference voltage based on the state of a data cell, reducing sensitivity to process variations and transistor mismatch, and allows adjustment of transistor characteristics to modify read margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If feature sizes and operating voltages are reduced to decrease power consumption, then power consumption is reduced, but sensitivity to noise and manufacturing process variations increases
Solution Approach 1:
The sense amplifier is divided into two separate paths: a first path for sensing the memory cell state and a second path for sensing the reference cell state. Each path has its own differential amplifier and transistor pair, allowing independent optimization and reducing the impact of process variations on the overall sensing operation.
Solution Approach 2:
The patent adjusts transistor characteristics (such as width-to-length ratios) of specific transistors in the first and second paths to balance the read margins for logic 0 and logic 1 states. This parameter tuning compensates for process variations and maintains reliable sensing operation at reduced voltages and feature sizes.
2Length of moving object
If conventional sense amplifiers are used with reduced feature sizes, then device scaling is achieved, but reading accuracy deteriorates due to increased sensitivity to process variations
Solution Approach 1:
The sensing operation is segmented into two independent differential comparisons: one comparing the memory cell current against a reference, and another providing a secondary reference comparison. This segmentation allows each path to be optimized for its specific function, improving overall reading accuracy despite reduced feature sizes.
Solution Approach 2:
A reference memory cell and its associated sensing path serve as an intermediary element that provides a stable reference for comparison. The second differential amplifier path with its own reference provides an additional intermediary comparison that helps cancel out common-mode noise and process variations, thereby improving reading accuracy.
3Reliability
If transistor characteristics are adjusted to balance read margins, then sensing performance is improved, but device complexity increases
Solution Approach 1:
The complex task of balancing read margins is segmented into manageable transistor adjustments within two separate differential amplifier paths. Each path requires adjustment of only a few key transistors, making the overall complexity more manageable than a single complex amplifier design.
Solution Approach 2:
The patent achieves improved sensing performance by adjusting parameters of existing transistors (such as width-to-length ratios) rather than introducing entirely new circuit topologies. This approach improves reliability while minimizing the increase in device complexity, as it works within the framework of standard differential amplifier designs.
Data Source
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AI summary
A sensing circuit is disclosed. The sensing circuit includes a first path including a first resistive memory device and a second path including a reference resistive memory device. The first path is coupled to a first split path including a first load transistor and to a second split path including a second load transistor. The second path is coupled to a third split path including a third load transistor and to a fourth split path including a fourth load transistor.