Split Pillar Memory Architecture for High Density
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Solution Overview
Problem
Existing memory devices face challenges in increasing memory cell density, reducing power consumption, and improving manufacturing efficiency, particularly in achieving high-density storage with lower production costs.
Innovation Solution
The memory device employs a split pillar architecture with conductive pillars arranged perpendicularly to word lines, allowing for a tighter control of cell thickness and dimension, and enabling a higher-density memory array with a cross-point architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a traditional memory device architecture is used, then the manufacturing process is simpler, but the memory cell density is lower
Solution Approach 1:
The pillar structure is divided into multiple segments with different materials along the vertical axis, creating distinct functional regions for charge trapping and tunneling operations. This segmentation enables higher density by allowing multiple storage nodes within a single vertical pillar structure
Solution Approach 2:
The invention transitions from planar memory architecture to three-dimensional vertical pillars, utilizing the vertical dimension to increase storage density. Multiple memory cells are stacked vertically along the pillar structure, effectively using Z-axis space to achieve higher cell density without increasing footprint area
2Reliability
If the dielectric thickness is increased to sustain voltage, then the voltage application is more reliable, but the memory cell density is reduced
Solution Approach 1:
Different dielectric materials with varying thicknesses are used in different regions of the pillar structure. Thicker dielectric layers are positioned where higher voltage sustainment is needed, while thinner regions allow for higher density, optimizing both reliability and density locally
Data Source
AI summary
Methods, systems, and devices for memory device with a split pillar architecture are described. A memory device may include a substrate arranged with conductive contacts in a pattern and openings through alternative layers of conductive and insulative material that may decrease the spacing between the openings while maintaining a dielectric thickness to sustain the voltage to be applied to the array. After etching material, an insulative material may be deposited in a trench. Portions of the insulative material may be removed to form openings, into which cell material is deposited. Conductive pillars may extend perpendicular to the planes of the conductive material and the substrate, and couple to conductive contacts. The conductive pillars and cell material may be divided to form a first and second storage components and first and second pillars.