SpRAM Inversion Flag Memory Block for Defect Tolerance
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Solution Overview
Problem
In Spin Transfer Random Access Memory (SpRAM) devices, repeated write operations can lead to electro-static breakdown of the tunnel insulating layer, making it difficult to read data correctly due to changes in resistance, especially when defects are present during the formation or processing of the TMR device.
Innovation Solution
A memory block configuration using an inversion flag device, where one memory device acts as a flag to invert data bits in other memory devices, allowing correct data reading even in the presence of defects, by using a sense amplifier to control write operations and read data based on the inversion flag's value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If write operations are repeatedly performed in SpRAM devices, then data can be written and overwritten, but the tunnel insulating layer experiences electro-static breakdown making it difficult to read data correctly
Solution Approach 1:
The patent applies preliminary action by performing a read verification operation immediately after each write operation to detect potential defects before they affect subsequent operations. The sense amplifier reads the written data and compares it with the input data to identify any write failures or defects in the tunnel insulating layer, allowing for corrective action before the defect propagates
Solution Approach 2:
The patent implements feedback by using the read operation results to control subsequent write operations. When a defect is detected through read verification, the system adjusts its behavior by preventing further write operations to the affected memory cell or block, thereby protecting data integrity while maintaining overall system productivity
2Manufacturing precision
If defects are present during formation or processing of TMR device, then manufacturing yield may be affected, but the inversion flag device enables correct data reading
Solution Approach 1:
The patent introduces an intermediary element - the inversion flag device - that mediates between the defective memory cells and the read operation. The inversion flag acts as a control signal that conditionally inverts the read output based on the state of the inversion flag memory cell, allowing correct data retrieval even when some memory cells contain defects
Solution Approach 2:
The patent applies parameter changes by utilizing the inversion flag mechanism to dynamically change the interpretation parameter of the read data. When the inversion flag is set, the read output is inverted (0 becomes 1, 1 becomes 0), effectively changing the data representation parameter to compensate for defects and enable correct reading
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate data reading and writing in SpRAM devices, even when defects are present, by using an inversion flag device to correct errors and maintain data integrity, thereby reducing the impact of defects on memory block operations.
Implementation Method 1
repeated write operations can lead to electro-static breakdown of the tunnel insulating layer, making it difficult to read data correctly due to changes in resistance
Implementation Method 2
magnetization inversion caused by spin transfer is described. The magnetic inversion caused by spin transfer is to generate magnetization inversion in a magnetic body by injecting spin-polarized electrons passing through the inside of another magnetic body into the magnetic body
Implementation Method 3
memories having a configuration using magnetization inversion caused by spin transfer have attracted attention
Data Source
AI summary
A memory includes: memory devices that each store data of one bit; and a read unit that, by using one predetermined memory device of the memory devices that are included in a memory block having a predetermined unit number of the memory devices as an inversion flag device, reads out data of (the predetermined unit number −1) bits that is written in the other memory devices with the bits being inverted in a case where the data of one bit written in the inversion flag device is a first value representing any one of “0” and “1” and directly reads out the data of (the predetermined unit number −1) bits that is written in the other memory devices in a case where the data of one bit written in the inversion flag device is a second value other than the first value.