SR Latch Time Amplifier Bias Control for Linear Input Range
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Solution Overview
Problem
Traditional time amplifiers face challenges in maintaining constant gain due to non-linear operational characteristics of transistors, limiting the range of available input values and making it difficult to broaden the input range without compromising gain linearity.
Innovation Solution
The design incorporates an SR latch with operation determination units, including transistors and current mirrors, to adjust the bias voltage and resistance values, allowing for separate control of gain and input range adjustments, ensuring linearity within a broader input range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a typical time amplifier uses the metastability of a transistor to amplify time difference, then the amplification function is achieved, but the range of available input value is limited greatly due to non-linear operational characteristics
Solution Approach 1:
The patent applies dynamics by making the power supply voltage to the SR latch dynamic and adjustable rather than fixed. The operation determination unit dynamically controls the power supply voltage based on the detected time difference, allowing the system to adapt its operating characteristics to different input ranges while maintaining linear amplification gain throughout the extended input range.
Solution Approach 2:
The patent changes the parameter of power supply voltage to the SR latch to resolve the contradiction. By adjusting the power supply voltage within a specific range, the system can extend the input range while maintaining constant linear amplification gain, overcoming the limitation of fixed non-linear characteristics in traditional metastability-based amplifiers.
2Adaptability or versatility
If the input range is broadened in a typical time amplifier, then more input values can be accepted, but it becomes difficult to maintain a time amplification gain constantly due to non-linear operational characteristics
Solution Approach 1:
The patent implements feedback through the operation determination unit that detects the time difference between input signals and uses this information to dynamically adjust the power supply voltage to the SR latch. This feedback mechanism ensures that the amplification gain remains constant and linear across the broadened input range by automatically compensating for non-linear effects.
Solution Approach 2:
The system dynamically adjusts the power supply voltage based on the operating conditions to maintain constant gain. This dynamic control allows the time amplifier to broaden its input range while preserving the stability of the amplification gain through real-time parameter adjustment.
3Power
If voltage is not sufficiently supplied to the gate of the transistor to create metastability, then the amplification function is achieved, but this state should be avoided in typical digital circuits due to instability
Solution Approach 1:
The patent dynamically controls the power supply voltage to the SR latch gate through the operation determination unit. Instead of using fixed insufficient voltage to create metastability, the system dynamically adjusts the voltage within an optimal range that enables linear amplification while maintaining circuit stability and avoiding the harmful effects of true metastable states.
Solution Approach 2:
The patent converts the potentially harmful metastable state into a beneficial linear amplification region by carefully controlling the power supply voltage. By operating in a controlled voltage range that mimics metastability without entering true metastable states, the system achieves linear time amplification while maintaining digital circuit reliability.
Data Source
AI summary
Provided is a time amplifier. The time amplifier includes: an SR latch providing an output at a timing determined according to a time difference between two inputs; and an operation determination unit connected to a power terminal of the SR latch and configured to determine an operation of the SR latch.