SRAM Bitline Precharging Circuit for Stability and Readability

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Solution Overview

Problem

Static Random Access Memory (SRAM) cells face instability during read and write operations due to conflicts between stability and readability/writeability, with techniques to improve stability often decreasing readability/writeability and vice versa, and existing methods to enhance stability during write operations negatively affect writeability.

Innovation Solution

The implementation of a precharging circuit that sets bitlines in an SRAM array to different voltage potentials for read and non-read operations, with a first voltage potential used for non-read operations and a second, higher voltage potential for read operations, improving the stability of half-selected columns during both reads and writes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bitlines are precharged to a higher voltage potential to improve readability, then the read current increases, but the stability of half-selected columns during write operations deteriorates

Engineering Contradiction:
ImprovereadabilityVSAvoidstability of half-selected columns
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by making the bitline precharge voltage dynamic rather than static. The precharge voltage is adjusted based on the operation type: a first voltage potential is used for read operations to maximize read current and readability, while a second voltage potential is used for write operations to maintain stability of half-selected columns. This dynamic adjustment resolves the contradiction by adapting the voltage level to the specific operational context.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter of the bitlines based on the operation being performed. By switching between two distinct voltage potentials (first voltage for reads, second voltage for writes), the system optimizes both readability and stability without compromise. This parameter change approach allows the same hardware to operate optimally under different operational conditions.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If word line potential is lowered during write operation to improve stability, then stability of selected cell improves, but writeability of the cell deteriorates

Engineering Contradiction:
Improvestability of selected cellVSAvoidwriteability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent changes the bitline voltage parameter during write operations to a second voltage potential that is optimized for stability. This voltage adjustment, combined with the write signal on the word line, maintains both stability and writeability by creating the appropriate voltage conditions for reliable data writing without requiring lowering of the word line potential.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary precharging of bitlines to the appropriate voltage potential before the write operation begins. This preliminary action ensures that the bitlines are at the correct voltage level (second voltage potential for writes) before the write signal is applied, which maintains stability while preserving writeability by avoiding the need to lower the word line potential.

Inventive Principle:
Principle #10Preliminary action

3Stability of the object's composition

If bitlines are precharged to a first voltage potential for non-read operations, then stability of half-selected columns during writes improves, but readability may be affected

Engineering Contradiction:
Improvestability during write operationsVSAvoidreadability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The system dynamically switches between two voltage potentials based on the operation type. For non-read operations (writes), the first voltage potential is used to maximize stability of half-selected columns. For read operations, the system switches to the second voltage potential to optimize read current and readability. This dynamic switching ensures both stability and readability are optimized for their respective operations without compromise.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9570155B2Circuit to improve SRAM stability
Publication Date: 2017.02.14 MARVELL ASIA PTE LTD
  • US9570155B2 patent drawing
  • US9570155B2 patent drawing
  • US9570155B2 patent drawing

AI summary

Approaches for stability of cells in a Static Random Access Memory (SRAM) array are provided. A circuit includes a precharging circuit configured to precharge bitlines of a Static Random Access Memory (SRAM) array to a first voltage potential for a non-read operation and to a second voltage potential for a read operation. The first voltage potential is different than the second voltage potential.