SRAM Cell Supply Switches for Write Margin
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Solution Overview
Problem
Existing SRAM cells face challenges in maintaining write margin due to charge contention and feedback loop structures, which affect reliability and power consumption, especially in ultra-low power applications where sub-threshold operation increases vulnerability to noise.
Innovation Solution
The proposed SRAM cell design includes a pair of cross-coupled inverters with supply switches that selectively cut off the supply voltage to the inverter with a charged state during write operations, eliminating charge contention and allowing static mode operation without sizing constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional SRAM cell structure with feedback loop is used, then read operation is stable, but write operation suffers from charge contention reducing write margin
Solution Approach 1:
The patent extracts the supply voltage connection from the inverter that is undergoing a write operation by activating the supply switch to disconnect VDD from the storage node. This separation eliminates the charge contention between the feedback loop and the write access transistor, allowing the write operation to proceed without the harmful interference that traditionally reduced write margin.
Solution Approach 2:
The patent introduces dynamic control of the supply voltage connection through the supply switch, which can be activated during write operations and deactivated during normal operation. This dynamic adjustment allows the circuit to adapt its behavior based on the operational phase, eliminating charge contention during writes while maintaining stable feedback during reads and normal operation.
2Use of energy by moving object
If supply voltage is continuously connected to maintain inverter operation, then read stability is maintained, but energy consumption increases during write operations
Solution Approach 1:
The patent employs periodic disconnection of the supply voltage during write operations through the supply switch. By temporarily cutting off VDD from the inverter during the write phase and restoring it during read and hold phases, the circuit achieves energy savings during writes while maintaining read stability when the supply is restored. This periodic action aligns the power supply connection with the operational requirements of different phases.
3Use of energy by moving object
If sub-threshold operation is used to reduce power consumption, then dynamic power is dramatically reduced, but sequential logic becomes more vulnerable to noise
Solution Approach 1:
The patent applies preliminary anti-action by preemptively disconnecting the supply voltage during write operations in sub-threshold mode. This prevents the accumulation of noise and charge contention effects that would otherwise degrade the write margin in the noise-sensitive sub-threshold region. By taking this preventive measure before the write operation completes, the circuit maintains adequate write margin despite operating in the vulnerable sub-threshold regime.
Data Source
AI summary
A static random access memory (SRAM) cell is provided with improved write margin. The SRAM cell includes: a pair of inverters cross coupled to each other and forming two storage nodes; read access switches electrically coupled between a read bit line and the two storage nodes; write access switches electrically coupled between write bit lines and two storage nodes; and supply switches electrically coupled between a supply voltage and the pair of inverters and operable, in response to a signal on at least one of the write bit lines, to selectively connect the supply voltage to at least one of the inverters in the pair of inverters. During a write operation, the supply switches operate to cut off the supply voltage to the inverter in the pair of inverters having a charged state.