SRAM-Based CMOS Ising Circuitry for Combinatorial Optimization

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Solution Overview

Problem

Current Ising machine technologies face challenges in scalability, energy efficiency, and compatibility with mainstream semiconductor manufacturing, making them impractical for solving real-world combinatorial optimization problems.

Innovation Solution

A CMOS Ising machine utilizing a linear-nonlinear feedback loop with SRAM cells for linear operation, noise addition, and nonlinear operation, integrated on a semiconductor substrate, which includes a multi-core architecture for parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If cryogenic super-conducting spins are used to find minimum energy state, then optimization problem solving capability is improved, but power consumption increases to kW-range and system cost reaches million-dollar

Engineering Contradiction:

Improveoptimization problem solving capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the mechanical/cryogenic super-conducting system with an electrical oscillator network that operates at room temperature using standard CMOS technology, eliminating the need for expensive cryogenic refrigeration systems while maintaining optimization solving capability

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating temperature parameter from cryogenic temperatures to room temperature, and transitions from super-conducting materials to standard CMOS transistors, fundamentally altering the physical operating conditions to reduce power consumption and system cost

Inventive Principle:

Principle #35Parameter changes

2Productivity

If optical oscillators are used to determine ground state, then optimization capability is improved, but scalability and energy efficiency deteriorate due to non-trivial nonlinear materials requirement

Engineering Contradiction:

Improveoptimization capabilityVSAvoidscalability

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent transitions from optical domain to electrical domain, changing the operating frequency parameter from optical frequencies to radio frequencies where standard CMOS transistors can operate, eliminating the need for specialized nonlinear optical materials

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent substitutes optical oscillators requiring nonlinear optical materials with electrical oscillators implemented using standard CMOS transistors, enabling compatibility with mainstream semiconductor manufacturing processes

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If coupled network of electrical oscillators is used, then optimization solving is improved, but device complexity increases making scaling and integration difficult

Engineering Contradiction:

Improveoptimization solving capabilityVSAvoidintegration complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the oscillator network into modular units where each oscillator is implemented as a separate CMOS circuit module, allowing independent fabrication and testing before integration, thereby reducing overall system complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent designs universal oscillator modules that can be replicated and tiled to solve different optimization problems, where each module serves multiple functions including frequency generation, coupling, and state representation

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Productivity

If memresistive cross-bar based methods are used, then Ising machine functionality is achieved, but speed decreases to MHz range and reprogramming time increases

Engineering Contradiction:

ImproveIsing machine functionalityVSAvoidoperating speed

Core Design Contradiction:

ProductivityVSSpeed

Solution Approach 1:

The patent replaces memresistive cross-bar structures with standard CMOS transistor-based oscillators, utilizing well-established high-speed CMOS technology to achieve GHz-range operating speeds while maintaining Ising machine functionality

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the programming mechanism from resistive switching in memristors to capacitive charging/discharging in CMOS circuits, enabling faster reconfiguration times and higher operating speeds compatible with standard semiconductor processes

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250278450A1Systems and methods including combinatorial optimization circuitry utilizing SRAM cells and noise

Publication Date: 2025.09.04 UNIV OF WASHINGTON

AI summary

Embodiments of the present disclosure provide systems, devices, and methods for solving combinatorial optimization problems using a device that functions as a CMOS Ising machine. An example device includes circuitry for linear operation, circuitry for noise addition, and circuitry for nonlinear operation. The circuitry for linear operation includes a plurality of SRAM cells in an SRAM cell array that store values of a coupling matrix. In some embodiments, circuitry for linear operation, circuitry for noise addition, and circuitry for nonlinear operation may be fabricated on a semiconductor substrate. In some embodiments, the device may include a feedback loop including circuitry for linear operation, circuitry for noise addition, and circuitry for nonlinear operation, wherein the circuitry for linear operation is coupled to the circuitry for nonlinear operation.