SRAM Data Inversion Circuit for Anti-Tamper Security
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Solution Overview
Problem
Data remanence in memory systems, such as SRAM and DRAM, poses security risks as critical data like encryption keys can be retained and recovered even after power is switched off, rendering anti-tamper mechanisms ineffective.
Innovation Solution
Periodically inverting data in memory systems using processing circuitry, with a second memory for tracking inversion states, and performing logical exclusive-OR operations between the two memories to prevent data remanence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If data is stored in memory for extended periods, then data retention is improved, but data remanence increases making security vulnerable
Solution Approach 1:
The patent applies periodic action by inverting data bits in memory cells at regular intervals defined by a clock signal. This periodic inversion ensures that data values change over time, preventing stable residual states from forming. The inversion occurs at specific clock cycles, creating a time-varying pattern that eliminates the conditions necessary for data remanence while maintaining data accessibility during operation.
Solution Approach 2:
The patent directly applies inversion by flipping data bits (0 becomes 1, 1 becomes 0) in memory cells periodically. This inversion mechanism fundamentally changes the data state over time, ensuring that even if power is removed, the memory cells do not retain stable residual representations of the original data. The inversion is tracked using XOR operations with a secondary memory to maintain data integrity.
2Reliability
If anti-tamper mechanisms erase data on intrusion detection, then security is improved, but they become ineffective when power is switched off due to data remanence
Solution Approach 1:
The patent applies preliminary action by continuously and periodically inverting data in memory cells before any potential power loss or tamper event can occur. This ongoing inversion ensures that when power is removed, the memory cells do not contain stable data states that could be recovered. The system proactively prevents data remanence formation rather than reacting to threats after they occur.
Solution Approach 2:
The patent converts the potential harm of data remanence into a benefit by using controlled periodic inversion. The same mechanism that could potentially corrupt data is instead used to prevent stable residual states from forming. By intentionally and systematically inverting data at controlled intervals, the system ensures that no usable residual data can persist after power removal, turning a potential vulnerability into a security feature.
3Object-affected harmful factors
If data inversion is implemented to prevent remanence, then security is improved, but device complexity increases due to additional circuitry
Solution Approach 1:
The patent applies universality by designing the periodic inversion mechanism to work with existing memory cell structures and clocking systems. The inversion logic integrates with standard memory read/write operations, and the secondary memory used for tracking inversions can be implemented using the same memory cell technology. This multi-functional approach allows the security feature to be added without fundamentally changing the memory architecture.
Solution Approach 2:
The patent uses an intermediary approach by introducing a secondary memory structure that tracks inversion states. This secondary memory acts as a mediator between the primary data storage and the inversion control logic. The XOR operation between primary and secondary memory provides a simple mechanism to track and manage inversion states without complex control circuitry, reducing overall system complexity while maintaining security effectiveness.
Data Source
AI summary
Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.