SRAM Latch-Up Erasure for Tamper-Triggered Key Destruction
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Solution Overview
Problem
Programmable logic devices using SRAM storage are vulnerable to unauthorized access and tampering due to the susceptibility of CMOS circuitry to latch-up, which existing encryption methods struggle to secure against, especially before the device enters user-mode.
Innovation Solution
Implementing a data destruction system that induces latch-up in specific circuitry elements by decoupling them from a negative supply voltage and coupling them to a positive supply voltage, using user-controlled transistors and command codes to erase or destroy sensitive information, thereby preventing unauthorized access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encryption algorithms are implemented to secure configuration data, then data security is improved, but encryption keys can still be deciphered by bombarding the device with false configuration data
Solution Approach 1:
The patent converts the harmful latch-up condition into a beneficial security mechanism. When false configuration data is detected or unauthorized access is attempted, the system intentionally induces latch-up in the CMOS circuitry to destroy the encryption keys and configuration data, thereby preventing unauthorized access despite the presence of encryption vulnerabilities
Solution Approach 2:
The patent implements preliminary protective action by pre-configuring the CMOS circuitry to be susceptible to latch-up induction before any attack occurs. The circuit is designed with specific transistor configurations and voltage connections that enable rapid induction of latch-up when triggered, preventing the completion of any key deciphering attack
2Speed
If SRAM storage is used in programmable logic devices, then device size is reduced and speed is improved, but data is lost when power is lost
Solution Approach 1:
The patent implements preliminary action by inducing latch-up in the SRAM circuitry before power is completely lost or when unauthorized access is detected. This preliminary destructive action ensures that even though SRAM is volatile and loses data on power loss, the data is deliberately erased at the appropriate moment to prevent unauthorized access
Solution Approach 2:
The patent changes the electrical parameters of the SRAM circuitry by inducing latch-up, which fundamentally alters the voltage and current states of the CMOS transistors. This parameter change transitions the circuit from a functional state to a destroyed state, ensuring data loss when needed for security purposes
3Reliability
If latch-up is induced in circuitry elements to destroy data, then data security is improved, but circuitry elements are destroyed
Solution Approach 1:
The patent converts the harmful effect of latch-up (circuitry destruction) into a beneficial security feature. The destruction of circuitry elements through induced latch-up is not a side effect but the intended mechanism for securing data, ensuring that encryption keys and configuration data are permanently destroyed when unauthorized access is detected
Solution Approach 2:
The patent implements a strategy of discarding the circuitry elements when they become compromised or when security threats are detected. Rather than attempting to repair or preserve the circuitry, the system deliberately destroys it through latch-up induction, and the device can be recovered by reprogramming with new configuration data
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively secures programmable devices by ensuring that sensitive information is destroyed or erased upon unauthorized access attempts, preventing data breaches and maintaining security even before the device enters user-mode.
Implementation Method 1
As a result, latch-up may be induced in the circuitry element and the circuitry element may be destroyed
Data Source
AI summary
Systems and methods are provided for destroying or erasing circuitry elements, data, or both, such as transistors, volatile keys, or fuse blocks, located in an integrated circuit device. An initiation signal may be provided to induce latch-up in a circuitry element in response to a user command, a tampering event, or both. As a result of the latch-up effect, the circuitry element, data, or both may be destroyed or erased.