SRAM Bit Line Current Mirroring to Prevent Multi-Row Read Flips
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Solution Overview
Problem
In-memory compute operations using SRAM arrays face data flip errors due to voltage drops on bit lines during simultaneous access of multiple rows, leading to accuracy issues and performance degradation, with existing solutions either increasing circuit area or reducing read current variability.
Innovation Solution
An in-memory computation circuit with adaptive supply voltage and current mirroring circuits to inhibit voltage drops on bit lines, using current mirroring to generate mirrored read currents and integrate them to maintain accurate read operations during simultaneous access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous access to multiple rows of SRAM array is performed for in-memory compute operation, then computation throughput is improved, but voltage drops on bit lines occur causing data flip errors
Solution Approach 1:
A current mirror circuit is introduced as an intermediary between the bit line and the read current path. The current mirror (comprising transistors M1 and M2) copies the bit line current to a separate path, preventing the read operation from directly loading the bit line voltage. This intermediary structure allows simultaneous row access while maintaining bit line voltage stability above the data flip threshold.
2Area of stationary object
If conventional read circuit is used during simultaneous row access, then circuit area is minimized, but read current variability increases leading to accuracy issues
Solution Approach 1:
The current mirror circuit creates a copy of the bit line current in transistor M2 that is proportional to the original current in transistor M1. This copied current path is used for the read operation, isolating it from voltage fluctuations on the bit line. The copying mechanism maintains read current stability without requiring additional large-area compensation circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents data flip errors and maintains read current stability, ensuring accurate computation results without increasing circuit area or reducing read current variability.
Implementation Method 1
a first current mirroring circuit coupled to the first bit line and configured to mirror a first read current on the first bit line to generate a first mirrored read current
Data Source
AI summary
An in-memory computation circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates word lines in parallel for an in-memory compute operation. A column processing circuit includes a current mirroring circuit that mirrors the read current developed on each bit line in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bias voltage for word line driver and a configuration of the current mirroring circuit to inhibit drop of a voltage on the bit line below a bit flip voltage during execution of the in-memory compute operation. The mirrored read current is integrated by an integration capacitor to generate an output voltage that is converted to a digital signal by an analog-to-digital converter circuit.