SRAM Non-Volatile Memory Control Cell Data Inversion
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Solution Overview
Problem
Existing memory devices combining SRAM and non-volatile memory cells face inefficiencies in data inversion management during power loss and restoration, leading to increased energy consumption, size constraints, and risks of data loss due to 'disturb' phenomena.
Innovation Solution
A method is introduced that associates a control cell with SRAM and non-volatile memory cells to detect data inversion, using a control datum to determine if data inversion has occurred, thereby optimizing write speed and power consumption without modifying the existing configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If double non-volatile storage is used to manage data inversion, then data inversion management is achieved, but time and energy consumption increase
Solution Approach 1:
A control cell is introduced as an intermediary element that tracks the inversion state of data in SRAM cells. This control cell stores a single bit indicating whether the associated SRAM cell's data has been inverted, allowing the system to manage data inversion without requiring double non-volatile storage, thus reducing energy consumption while maintaining reliability
2Reliability
If connections of elementary memory cells are crossed between non-volatile writing and SRAM reloading, then data inversion is managed, but device size increases
Solution Approach 1:
The memory system is segmented into SRAM cells, non-volatile memory cells, and separate control cells. Each control cell is associated with one or more SRAM cells and stores inversion state information. This segmentation allows data inversion management without requiring complex crossed connections between memory cells, thereby managing device size while maintaining reliability
3Productivity
If SRAM reloading is performed by drawing on supply voltage Vdd, then reloading operation is achieved, but substantial currents are required and charge loss risk increases
Solution Approach 1:
A control mechanism with feedback is implemented where control cells monitor the state of SRAM cells and track inversion events. This feedback system allows the memory controller to manage reloading operations intelligently, reducing the risk of charge loss by avoiding unnecessary high-current operations and optimizing when Vdd-based reloading is performed, thus maintaining productivity while improving reliability
Data Source
AI summary
A method can be used for managing the operation of a memory cell that includes an SRAM elementary memory cell and a non-volatile elementary memory cell coupled to one another. A data bit is transferred between the SRAM elementary memory cell and the non-volatile elementary memory cell. A control datum is stored in a control memory cell that is functionally analogous to and associated with the memory cell. The data bit is read from the SRAM elementary memory cell and a corresponding read of the control datum is performed. The data bit read from the SRAM elementary memory cell is inverted if the control datum has a first value but the data bit read from the SRAM elementary memory cell is not inverted if the control datum has a second value.