Hybrid SRAM OTP Memory Cell for FPGA Reconfigurability

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Solution Overview

Problem

Field programmable gate arrays (FPGAs) face challenges with existing memory technologies, as volatile memory cells require reconfiguration upon power-up and have slower power-up times, while nonvolatile memory cells are not easily reconfigurable and require nonstandard semiconductor processes.

Innovation Solution

A combination of SRAM and OTP memory units is used to create memory cells that are programmable, reprogrammable, and nonvolatile, allowing for permanent programming and improved operating characteristics, such as greater device longevity and data retention, by integrating an SRAM part with a nonvolatile OTP part.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If volatile memory cells are used, then reconfigurability is improved, but power-up time increases and data retention worsens

Engineering Contradiction:
ImprovereconfigurabilityVSAvoidpower-up time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The memory cell is divided into two distinct parts: a volatile SRAM portion for temporary data storage and a nonvolatile OTP portion for permanent configuration storage. This segmentation allows each part to perform its specialized function optimally - SRAM provides fast reconfigurability while OTP provides permanent retention without requiring full reconfiguration on power-up.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines SRAM and OTP memory technologies into a single hybrid memory cell structure. The SRAM portion handles volatile, rapidly accessible data while the OTP portion maintains permanent configuration settings. This merging resolves the contradiction by integrating both reconfigurability and data retention capabilities within one cell.

Inventive Principle:
Principle #5Merging (Combining)

2Duration of action of stationary object

If nonvolatile memory cells are used, then data retention is improved, but reconfigurability worsens

Engineering Contradiction:
Improvedata retentionVSAvoidreconfigurability
Core Design Contradiction:
Duration of action of stationary objectVSAdaptability or versatility

Solution Approach 1:

The memory cell is divided into two distinct parts: a volatile SRAM portion for temporary data storage and a nonvolatile OTP portion for permanent configuration storage. This segmentation allows each part to perform its specialized function optimally - SRAM provides fast reconfigurability while OTP provides permanent retention without requiring full reconfiguration on power-up.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines SRAM and OTP memory technologies into a single hybrid memory cell structure. The SRAM portion handles volatile, rapidly accessible data while the OTP portion maintains permanent configuration settings. This merging resolves the contradiction by integrating both reconfigurability and data retention capabilities within one cell.

Inventive Principle:
Principle #5Merging (Combining)

3Duration of action of stationary object

If nonstandard semiconductor processes are used for nonvolatile memory, then manufacturing complexity increases

Engineering Contradiction:
Improvedata retentionVSAvoidmanufacturing process
Core Design Contradiction:
Duration of action of stationary objectVSEase of manufacture

Solution Approach 1:

The hybrid memory cell is designed to be compatible with standard CMOS semiconductor manufacturing processes. By using conventional fabrication techniques that can produce both SRAM and OTP structures in the same process flow, the design achieves nonvolatile data retention without requiring specialized or nonstandard manufacturing processes, thus resolving the contradiction between data retention and ease of manufacture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7277348B2Memory cell comprising an OTP nonvolatile memory unit and a SRAM unit
Publication Date: 2007.10.02 LATTICE SEMICON CORP
  • US7277348B2 patent drawing
  • US7277348B2 patent drawing
  • US7277348B2 patent drawing

AI summary

Memory cells including an SRAM and an OTP memory unit that combine the advantages of both technologies and can be fabricated by standard CMOS manufacturing without additional masking. The concepts and details may be applied to and utilized in other systems requiring memory and/or employing other fabrication technologies. Among other advantages, the SRAM part of memory cells allows countless programming of the cell, which is useful, for example, during the prototyping. The OTP part is utilized to permanently program the memory cell by either using external data or the data already existing in the SRAM part of the cell. The value held by the OTP unit may also be written directly into the SRAM part of the cell.