SRAM PUF Bit Stability Screening with Digital Tilting
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Solution Overview
Problem
Existing SRAM PUFs in transistor circuitry are vulnerable to noise and environmental effects, leading to unreliable bits and the need for error correction codes, which compromises security by exposing sensitive information.
Innovation Solution
A purely digital tilting method is introduced to identify and eliminate unstable bits, allowing for increased bit density per cell and reducing the reliance on error correction codes, using digital capacitors to adjust the imbalance between voltage sides without requiring costly analog control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional SRAM PUF circuits are used, then sensitivity to device variation is achieved, but vulnerability to noise and environmental effects increases
Solution Approach 1:
The PUF array is divided into multiple blocks, with each block containing multiple bits. This segmentation allows independent evaluation and selection of stable bits from each block, isolating the effects of noise and environmental variations on individual bits while maintaining overall system reliability through collective stable bit selection.
Solution Approach 2:
The method performs preliminary identification of unstable bits by evaluating bit stability across multiple measurements before final PUF key generation. This preliminary action filters out bits susceptible to noise and environmental effects, ensuring only stable bits are used in the final cryptographic key, thereby resolving the reliability issue while preserving sensitivity to device variation.
2Reliability
If error correction codes are used to compensate for unstable bits, then reliability is improved, but security is compromised due to exposure of secure information
Solution Approach 1:
The method extracts and removes unstable bits from the PUF array through stability evaluation and selection, creating a filtered set of only stable bits for cryptographic key generation. This extraction approach eliminates the need for error correction codes that would otherwise expose secure information, as unstable bits are simply excluded rather than corrected through information-revealing mechanisms.
Solution Approach 2:
The method uses multiple measurements and evaluations of bit stability as a disposable resource to identify and eliminate unstable bits. These preliminary measurements are discarded after serving their purpose of filtering unstable bits, and the final cryptographic key is generated solely from stable bits without requiring error correction codes, thus maintaining security while achieving reliability.
3Reliability
If multiple measurements are performed to identify unstable bits, then reliability is improved, but time consumption increases
Solution Approach 1:
The method performs a limited number of measurements (e.g., 3-5 measurements per bit) to identify unstable bits, which is sufficient to detect bits with high variability but does not require exhaustive measurement. This partial action approach achieves adequate reliability for unstable bit identification while constraining time consumption, balancing accuracy with efficiency in the bit selection process.
Data Source
AI summary
A method for detecting unreliable bits in transistor circuitry includes adjusting a value of a variable capacitor coupled to a physical unclonable function (PUF) cell of a transistor circuit. The adjusting includes tilting the PUF cell to either a zero or one state: if the PUF cell changes its state during the tilting it is deemed unstable, and if the PUF cell does not change its state during the tilting it is deemed stable.