User Identity/Authority Verification TRIZ Cases
- FPGA Configuration Authentication Using Chained Integrity Checks
Split FPGA configuration records use chained cryptographic integrity checks and an external authentication module to block manipulation with less verification complexity.
- Transistor PUF Circuit Using Threshold Voltage Variation
Threshold voltage variation in fabricated transistors is used to generate stable PUF responses with lower sensitivity to temperature and interference.
- Checksum Verification for AV Content Format Conversion Integrity
Checksums verify AV file format conversions across playback formats and encryption changes, helping detect corruption without full file comparison.
- Mobile App Risk Analysis Using Privacy-Preserving Hash Matching
Cryptographic app hashes enable enterprise risk checks and automatic remediation on personal mobile devices without exposing user app details.
- Hierarchical Integrity Verification for Erasure-Coded Data Fragments
CRC-based local and global digest checks verify erasure-coded data integrity while cutting network transfer, CPU load, and memory use.
- SRAM PUF Bit Stability Screening with Digital Tilting
Digital capacitor tilting flags unstable SRAM PUF bits, improving output reliability and reducing reliance on error correction codes.
- Private Mobile App Risk Analysis Using Cryptographic Hashes
Cryptographic app hashes enable mobile risk scoring and quarantine of known threats without exposing user-identifying app data.
- OSI Network Data Prediction for Low-Power Reliable Reception
Predicted OSI data blocks enable early decoding checks, cutting IoT receiver power use while improving reception reliability and range.
- Oscillator PUF Authentication Using Temperature Compensation Data
Temperature compensation data in an oscillator is reused to generate unique PUF information, strengthening device authentication against spoofing.
- SRAM PUF Reset Circuit for Voltage Tempering Protection
Voltage tempering detection triggers an SRAM PUF reset to lock bit cells into a uniform state, stopping retention attacks without boot delay.
- Keyed Cryptographic Checksum for Secure CRC Authentication
A keyed generator polynomial turns CRC-style checksums into lightweight message authentication that detects malicious changes and double-bit errors.
- Floating-Gate MOS PUF Circuit for Secure Key Generation
Two floating-gate MOS transistors generate hard-to-crack random keys with simpler PUF circuitry and easier CMOS integration.
- Asymmetric Checksum Mapping for Fault-Tolerant Verification
Bijective checksum mapping separates generation from verification, helping detect corrupted data even when the verifier malfunctions.
- Pseudo-DRAM PUF Circuit for Fast Operation in Extreme Temperatures
A floating-capacitor pseudo-DRAM PUF shifts leakage behavior to keep signature generation fast and reliable across extreme temperatures.
- Mobile App Hash Screening for Enterprise Security and User Privacy
Cryptographic app fingerprints let enterprises detect and remediate risky mobile apps without exposing installed app details on personal devices.
- Differential Delay Circuit for Stable PUF Bit Generation
Differential delay paths and feedback transfer gates improve PUF bit stability and statistical quality while reducing error correction needs.
- MOS Transistor PUF Using Witness Bias for Stable Unique Keys
Random dopant threshold shifts in MOS transistors generate unclonable keys, while witness-biased current comparison improves stability against temperature and aging.