SRAM PUF Reset Circuit for Voltage Tempering Protection
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Solution Overview
Problem
Existing methods for preventing cell retention failure attacks in SRAM-based PUF generators are either costly, increase boot time, or require complex cryptographic primitives that exceed the capabilities of resource-constrained devices.
Innovation Solution
A novel circuit design for a PUF generator that includes a PUF cell array, a PUF control circuit, and a reset circuit, which detects voltage tempering events and resets bit cells to their initial logical states, preventing attacks by locking all cells to a uniform state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate SRAM block is used just for building the PUF, then security against cell retention failure attacks is improved, but implementation cost and device area significantly increase
Solution Approach 1:
The patent merges the PUF generation function with the existing SRAM memory block by adding a reset circuit that can force all bit cells to a uniform initial state. This allows the same SRAM block to serve both as user data storage and as the PUF generator, eliminating the need for a separate dedicated PUF SRAM block while maintaining security against cell retention failure attacks.
2Reliability
If the device waits for stored memory values to decay before reading data after power tempering detection, then security is improved, but boot time significantly increases
Solution Approach 1:
The reset circuit is pre-configured to immediately reset all SRAM bit cells to their uniform initial state upon detecting power tempering events. This preliminary action eliminates the need to wait for memory value decay, as the system proactively resets the cells before any potential attack can occur, maintaining both security and fast boot time.
3Reliability
If cryptographic primitives are used to obfuscate PUF response bits, then security is improved, but device complexity exceeds the capabilities of resource-constrained devices
Solution Approach 1:
Instead of using complex cryptographic primitives to obfuscate PUF responses, the patent converts the potential harm of cell retention failure attacks into a benefit by designing a reset circuit that forces all cells to a uniform initial state. This physical-layer solution eliminates the need for complex software-based cryptographic obfuscation, providing strong security suitable for resource-constrained devices.
Data Source
AI summary
Methods and apparatus for protecting a physical unclonable function (PUF) generator are disclosed. In one example, a PUF generator is disclosed. The PUF generator includes a PUF cell array, a PUF control circuit and a reset circuit. The PUF cell array comprises a plurality of bit cells. Each of the plurality of bit cells is configurable into at least two different stable states. The PUF control circuit is coupled to the PUF cell array and is configured to access each of the plurality of bit cells to determine one of the at least two different stable states upon a power-up of the plurality of bit cells, and generate a PUF signature based on the determined stable states of the plurality of bit cells. The reset circuit is coupled to the PUF cell array and is configured to set the plurality of bit cells to represent their initialization data based on an indication of a voltage tempering event of a supply voltage of the PUF cell array.