SRAM Retention Voltage Adjustment via Process Variation Detection

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Solution Overview

Problem

Conventional SRAM cell designs operate with higher retention voltages than necessary, leading to increased leakage currents and excess power consumption, especially in battery-operated devices where SRAM cells spend most of their time in retention mode.

Innovation Solution

The method involves detecting process variation information in an array of SRAM cells and generating a control word to set a reference voltage proportional to absolute temperature, ensuring the SRAM cells are powered with the minimum necessary retention voltage to maintain data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the SRAM supply voltage generator and ground voltage generator are designed to provide sufficient retention voltage for the worst process corner, then data retention reliability is improved, but power consumption increases due to excess leakage currents

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent changes the retention voltage parameter dynamically based on process variation information. By detecting process variation and adjusting the retention voltage accordingly, the system moves from a fixed worst-case voltage to an adaptive voltage level, reducing leakage current while maintaining data retention reliability for each specific SRAM die

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality by tailoring the retention voltage to each individual SRAM die's process characteristics. Instead of using a uniform worst-case voltage for all dies, each die receives a customized retention voltage based on its specific process variation, optimizing the balance between reliability and power consumption for local conditions

Inventive Principle:
Principle #3Local quality

2Reliability

If a higher retention voltage is used to ensure data retention in retention mode, then reliability is improved, but leakage currents increase leading to excess power consumption

Engineering Contradiction:
Improvedata retentionVSAvoidleakage currents
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent adjusts the retention voltage parameter based on detected process variation information. By changing the voltage level to match the actual process characteristics of each SRAM die, the system reduces unnecessary leakage currents while maintaining sufficient data retention reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback by detecting process variation information and using it to adjust the retention voltage. This closed-loop approach allows the system to respond to actual process conditions, minimizing leakage currents while ensuring data retention reliability

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption by minimizing the retention voltage required for SRAM cells, thereby decreasing leakage currents and extending battery life in portable devices.

Implementation Method 1

A reference voltage is generated that is proportional to absolute temperature and has a magnitude curve that is set by the control word

Methodology Applied
Scientific EffectProportional to absolute temperature (PTAT):

Data Source

PatentUS20250069652A1Circuitry for adjusting retention voltage of a static random access memory (SRAM)
Publication Date: 2025.02.27 STMICROELECTRONICS INT NV
  • US20250069652A1 patent drawing
  • US20250069652A1 patent drawing
  • US20250069652A1 patent drawing

AI summary

Disclosed herein is a method of operating a static random access memory (SRAM) device in retention mode. The method includes powering an array of SRAM cells between first and second voltages in retention mode, detecting process variation information about the array of SRAM cells, and generating a control word based thereupon. The method continues with generating a reference voltage that is proportional to absolute temperature and having a magnitude curve that is set by the control word, and then maintaining the second voltage as being equal to the reference voltage.