SRAM Transistor Testing via Source Follower Circuit
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Solution Overview
Problem
Conventional SRAM test methods cannot effectively detect transistor defects within memory cells due to the inability to obtain an analog output representing transistor characteristics, which hinders the measurement of transistor characteristics necessary for improving SRAM yield.
Innovation Solution
A test device and method that connect a resistor to a selected memory cell's bit line, forming a source follower circuit with applied voltages to measure the characteristics of p-type and n-type transistors, allowing for the detection of defects by monitoring output voltage waveforms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SRAM test methods are used to determine whether test mode is correctly read, then the test process is simple, but transistor defects within memory cells cannot be detected
Solution Approach 1:
A resistor is introduced as an intermediary component connected to the bit line of the selected memory cell. This resistor enables the formation of a source follower circuit that produces an analog output signal, allowing transistor characteristics to be measured without fundamentally redesigning the entire test system. The resistor acts as a mediator that converts the digital memory cell output into an analog signal suitable for transistor characterization.
Solution Approach 2:
The test method changes the voltage parameters applied to the memory cell to transform its operation mode. By applying a voltage higher than the power supply voltage to the word line and configuring the bit line voltage appropriately, the memory cell is made to operate as a source follower circuit rather than a conventional latch, enabling analog output that reflects transistor characteristics.
2Measurement precision
If the memory cell operates as a cross-coupled latch circuit with fully swung output, then the memory function is reliable, but an analog output representing transistor characteristics cannot be obtained
Solution Approach 1:
The memory cell's operating state is dynamically changed based on the test requirements. By controlling the word line voltage to be higher than the power supply voltage and configuring the bit line voltage appropriately, the cell transitions from its normal latch mode with fully swung output to a source follower mode that provides analog output. This dynamic reconfiguration allows the same hardware to serve both memory and transistor characterization functions.
3Reliability
If a voltage higher than power supply voltage is applied to the word line, then p-channel transistor defects can be detected, but the circuit operation becomes more complex
Solution Approach 1:
The test device is designed with multi-functional voltage application capabilities. The same voltage application circuitry that normally provides power supply voltage to the word line is extended to provide higher voltages when needed for transistor characterization. This universal design allows the test equipment to handle both conventional memory testing and transistor defect detection without requiring separate dedicated voltage sources.
Data Source
AI summary
A test device capable of measuring characteristics of respective transistors constituting a memory cell is provided. The test device for testing a SRAM connects a resistor to a bit line on one side of a memory cell selected by a word line selection circuit and a bit line selection circuit of the SRAM. In a manner that a selected transistor and a resistor of the memory cell constitute a source follower circuit, the test device applies a voltage to each portion of the memory cell, applies an input voltage to a gate of the transistor constituting the source follower circuit, and inputs an output voltage outputted from a source of the transistor constituting the source follower circuit.