SRAM Layout Pattern With Split VSS for Faster Stable Reads
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Solution Overview
Problem
Conventional SRAM designs face challenges in achieving high reading speed without compromising the stability of the latch circuit due to the shared voltage source connection affecting potential differences and generating leakage currents.
Innovation Solution
The SRAM layout is redesigned with independent voltage sources for the drains of pull-down transistors and read port transistors, allowing for independent potential adjustments to enhance reading speed and stability by separating the first and second voltage sources (Vss1 and Vss2).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the voltage source for pull-down transistors and read port transistors is shared, then the circuit complexity is reduced and manufacturing is simplified, but the reading speed cannot be improved without causing leakage currents and data loss
Solution Approach 1:
The patent segments the previously shared voltage source into two independent voltage sources: a first voltage source (VSS1) for pull-down transistors and a second voltage source (VSS2) for read port transistors. This segmentation allows independent voltage control, enabling the second voltage source to be lowered to negative potential during reading operations to improve reading speed without causing leakage currents that would affect data stability, since the first voltage source remains at its normal potential.
2Speed
If the voltage of the shared voltage source is lowered to improve reading speed, then the reading speed increases, but leakage currents occur and data stability deteriorates
Solution Approach 1:
By dividing the shared voltage source into two independent sources, the patent enables selective voltage adjustment. The second voltage source can be lowered to negative potential specifically for read port transistors during reading operations to enhance reading speed, while the first voltage source for pull-down transistors remains stable, preventing leakage currents and maintaining data stability.
3Speed
If independent voltage sources are used for pull-down and read port transistors, then reading speed is improved and leakage is reduced, but the device complexity increases
Solution Approach 1:
The patent implements segmentation by creating two separate voltage source domains. This is achieved through separate voltage source connections in the circuit design, where the first voltage source connects to pull-down transistors and the second voltage source connects to read port transistors. The segmentation allows independent voltage control without requiring complete redesign of the SRAM architecture.
Solution Approach 2:
The patent utilizes parameter changes by allowing the second voltage source to dynamically adjust its potential based on operational mode. During reading operations, the second voltage source transitions to negative potential to enhance reading speed, while during normal operations it maintains standard potential. This dynamic parameter adjustment optimizes performance without permanently increasing device complexity.
Data Source
AI summary
The invention provides a layout pattern of static random access memory, which comprises a plurality of fin structures on a substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate. The transistors include a first pull-up transistor (PU1), a first pull-down transistor (PD1), a second pull-up transistor (PU2) and a second pull-down transistor (PD2), a first access transistor (PG1), a second access transistor (PG2), a first read port transistor (RPD) and a second read port transistor (RPG). The gate structure of the first read port transistor (RPD) is connected to the gate structure of the first pull-down transistor (PD1), wherein a drain of the first pull-down transistor (PD1) is connected to a first voltage source Vss1, and a drain of the first read port transistor (RPD) is connected to a second voltage source Vss2.