SRAM Tracking Control Circuit for Multi-Voltage Operation

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Solution Overview

Problem

Existing SRAM memory units are limited to operating at specific voltages, leading to performance degradation when forced to work at different voltages, and existing solutions that increase flexibility by adding tracking bit lines result in significant area impact, which is undesirable in downsizing semiconductor manufacturing.

Innovation Solution

The implementation of a tracking control circuit with configurable tracking word lines that adjust the number of tracking cells based on the operating voltage, allowing the SRAM memory unit to operate at multiple voltages without increasing the area footprint, by emulating the timing characteristics of bit cells during read and write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of tracking cells is increased to improve timing accuracy at higher voltages, then the timing characteristics are improved, but the area occupied by the tracking control circuit increases

Engineering Contradiction:
Improvetiming accuracyVSAvoidtracking control circuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The tracking control circuit dynamically configures the number of tracking cells based on the operating voltage. At higher voltages where timing accuracy is more critical, more tracking cells are activated. At lower voltages, fewer tracking cells are needed. This dynamic adaptation allows the circuit to maintain timing accuracy across different voltage conditions while minimizing the area footprint by only activating the necessary number of tracking cells for each operating condition.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of the tracking control circuit by adjusting the number of active tracking cells according to the voltage level. This parameter change allows the same physical circuit to achieve different levels of timing precision without requiring separate circuits for each voltage condition, thereby avoiding area multiplication while maintaining measurement precision across varying conditions.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the SRAM memory unit is designed to work at multiple voltages, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
Improvevoltage range supportVSAvoidtracking control circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The tracking control circuit is designed as a universal circuit that can operate across multiple voltage conditions by configuring different numbers of tracking cells. Rather than designing separate tracking circuits for each voltage level, this single multi-functional circuit adapts to different voltage conditions through configuration, thereby achieving voltage range support without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The circuit employs dynamic configuration capabilities that allow it to adapt its structure and operation based on the detected voltage level. This dynamic behavior enables the same circuit to serve multiple voltage conditions, achieving versatility without requiring multiple static circuits, thus managing device complexity while expanding adaptability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9865335B2SRAM device capable of working in multiple low voltages without loss of performance
Publication Date: 2018.01.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9865335B2 patent drawing
  • US9865335B2 patent drawing
  • US9865335B2 patent drawing

AI summary

A memory device comprises a tracking control circuit for controlling the write operation or the read operation of the memory device. The tracking control circuit comprises a plurality of tracking cells, wherein the timing characteristics of the tracking cells emulate the timing characteristics of a bit cell during a write operation or a read operation of the memory device. The memory device further comprises at least two reference word lines for configuring the number of tracking cells of the tracking control circuit; and a selection circuit configured to activate one or more of the at least two reference word lines.