SRAM Tracking Circuit for Word Line Pulse Width Control
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Solution Overview
Problem
Static random access memory (SRAM) consumes excessive active power due to non-optimized pulse widths of word lines, particularly in high-speed communication and image processing applications, leading to inefficiencies in data access operations.
Innovation Solution
The implementation of a memory device with a tracking circuit and control circuit that modulate word line signals by adjusting pulse widths based on the distance of word lines from the I/O circuit and control circuit, utilizing additional tracking cells to optimize pulse widths and reduce active power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If word line pulse widths are extended to ensure data access for distant memory cells, then reliability of data access is improved, but active power consumption increases
Solution Approach 1:
The patent applies local quality by providing different pulse widths to different word lines based on their distance from the I/O circuit. Word lines closer to the I/O circuit receive shorter pulse widths while distant word lines receive longer pulse widths, optimizing both power consumption and data access reliability for each local region.
Solution Approach 2:
The patent implements dynamics by making the word line pulse widths adjustable and adaptive rather than fixed. The system dynamically selects appropriate pulse widths from a set of predetermined values based on the distance of each word line from the I/O circuit, allowing optimization of power consumption while ensuring reliable data access.
2Device complexity
If uniform pulse widths are applied to all word lines, then device complexity is reduced, but data access consistency deteriorates
Solution Approach 1:
The patent applies segmentation by dividing the word lines into multiple groups based on their distance from the I/O circuit. Each group is assigned a specific pulse width from a set of predetermined values, allowing data access consistency to be maintained without requiring individually customized control for each word line.
Solution Approach 2:
The patent implements local quality by providing different pulse width characteristics to different regions of the memory array. Word lines in distant regions receive longer pulse widths while closer word lines receive shorter pulse widths, ensuring consistent data access across the entire array while maintaining manageable control circuit complexity.
Data Source
AI summary
A memory device including a first memory cell, a first tracking cell, a tracking bit line, a second tracking cell and a word line driver. The first memory cell is configured to receive a first word line signal. The first tracking cell is configured to emulate the first memory cell. The tracking bit line is configured to transmit a tracking bit line signal to the first tracking cell. The second tracking cell is configured to adjust the tracking bit line signal according to the first word line signal. The word line driver is configured to adjust the first word line signal according to the tracking bit line signal and a first distance between the second tracking cell and a common node on the tracking bit line.