SRAM Word Line Assistance Timing Using a Tracking Column
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Solution Overview
Problem
Existing SRAM devices face challenges in maintaining stability and performance due to unpredictable activation of word line assistance circuits, leading to issues such as data corruption and degraded performance when transitioning between operation modes.
Innovation Solution
A memory circuit with a tracking column that includes tracking cells to emulate signal propagation delay, allowing accurate activation of a word-line assistance circuit to boost voltage levels based on a tracking signal, thereby enhancing operational stability and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If word line assistance circuits are activated to boost voltage levels for improved performance, then operational speed is enhanced, but unpredictable activation timing causes data corruption and stability issues
Solution Approach 1:
The tracking column is activated in advance alongside the nominal memory cells to predict signal propagation delays. This preliminary action allows the system to determine the optimal activation time for the word line assistance circuit before actual memory operations commence, ensuring both speed enhancement and data stability.
Solution Approach 2:
The tracking column provides feedback information about signal propagation characteristics to the word line assistance circuit control logic. This feedback mechanism enables precise timing control of the assistance circuit activation, preventing data corruption while maximizing operational speed benefits.
2Measurement precision
If tracking column is added to emulate signal propagation delay for accurate timing, then activation precision is improved, but device complexity increases
Solution Approach 1:
The tracking column is a simplified copy of the nominal memory cell structure that replicates only the essential signal propagation characteristics. By copying the critical path delay elements without full memory functionality, the system achieves precise timing measurement while minimizing the increase in device complexity.
3Speed
If word line voltage is boosted to enhance performance, then operational speed improves, but power consumption increases
Solution Approach 1:
The word line assistance circuit is activated periodically only when needed based on the tracking column's prediction of signal propagation delays. This periodic activation rather than continuous operation provides speed enhancement during critical moments while minimizing overall power consumption during non-critical periods.
Data Source
AI summary
A memory circuit includes a memory array comprising first memory cells, each of the first memory cells configured to store a data bit; a tracking column comprising at least a second memory cell and a third memory cell, wherein the second memory cell is coupled to a first tracking bit line, a second tracking bit line, and a tracking word line, and the third memory cell is coupled to the first tracking bit line; and a word line assistance circuit coupled to the memory array and the tracking column. The word line assistance circuit can receive a control signal present on a control line coupled to the third memory cell; and in response to a transition of the control signal, increase a voltage level of an operation voltage applied to a word line corresponding to an asserted one of the first memory cells.