SRAM Write Assist Circuit Using Threshold Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As memory devices like SRAM achieve smaller line sizes, production variations narrow the effective voltage range, reducing memory stability and requiring additional power supplies or inefficient on-chip regulators to maintain data integrity during write operations.
Innovation Solution
A static random access memory decoder circuit with a write assist circuit that includes threshold transistors to dynamically reduce cell supply voltage during write operations, using control circuitry to select and connect cell supply lines to threshold transistors, thereby managing voltage levels effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional power supply circuits or on-chip reference voltage regulators are implemented to provide multiple cell supply voltages, then memory stability during write operations is improved, but device complexity and cost increase
Solution Approach 1:
The write assist circuit uses the inherent threshold voltage characteristics of existing transistors in the memory cell to automatically reduce the effective supply voltage during write operations. The circuit leverages the natural voltage drop across threshold transistors when they are in the triode region, eliminating the need for external voltage regulation circuits while maintaining write stability.
Solution Approach 2:
The invention dynamically changes the effective supply voltage parameter during write operations by controlling the operating region of threshold transistors. By switching these transistors into the triode region during writes, the effective voltage is reduced to the threshold level, improving write stability without requiring multiple power supply rails or complex voltage regulators.
2Reliability
If additional power supply circuits or on-chip reference voltage regulators are implemented to provide multiple cell supply voltages, then memory stability during write operations is improved, but power efficiency deteriorates
Solution Approach 1:
The write assist circuit exploits the intrinsic threshold voltage properties of existing transistors to achieve dynamic voltage reduction. This self-service approach uses the transistor's own electrical characteristics rather than external power regulation, eliminating the power overhead associated with voltage regulators while maintaining reliable write operations.
Solution Approach 2:
The effective supply voltage is dynamically changed by controlling transistor operating regions. During write operations, threshold transistors are switched to the triode region to reduce effective voltage to threshold levels, improving write stability. During read operations, the transistors return to normal operation, maintaining full power efficiency for read accesses.
3Reliability
If production process variations are reduced to maintain wider voltage range, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The invention converts the harmful effect of production process variations into a beneficial feature. By using threshold transistors whose threshold voltages naturally vary with process conditions, the circuit automatically adapts to process variations. The threshold voltage itself becomes a process variation compensating parameter, turning manufacturing imprecision into a self-correcting mechanism.
Solution Approach 2:
The circuit dynamically adjusts the effective supply voltage parameter to compensate for process variations. By controlling threshold transistors to operate in specific regions, the effective voltage is adjusted to maintain stable write operations across different process conditions, eliminating the need for tight manufacturing tolerances.
Data Source
AI summary
A static random access memory decoder circuit includes a first cell supply line coupled to provide a first column of memory cells a first cell supply voltage and a second cell supply line coupled to provide a first column of memory cells a first cell supply voltage. The decoder circuit further includes a write assist circuit having a first threshold transistor coupled to the first cell supply line and a second threshold transistor coupled to the second cell supply line. In response to a write assist signal, the write assist circuit connects one of the first and second cell supply lines selected by control circuitry to an associated one of the first and second threshold transistors, such that a cell supply voltage of the selected one of the first and second cell supply lines is reduced toward the threshold voltage of the threshold transistor.