SRAM Write-Assist Circuit with VDD-to-VCS Level Shifting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor memory technology scales to smaller sizes and lower power schemes, the reduced operating voltages lead to reduced read and write margins in SRAM bit cells, causing errors in read and write operations.
Innovation Solution
An electronic circuit that translates a write signal from a lower voltage domain to a higher voltage domain, using a negative voltage boost to improve the write margin, with control over boost pre-charge and enablement based on data write masking, and utilizing a VCS-driven bit line discharge and boost capacitor charge to ensure reliable writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If operating voltage is reduced to achieve lower power consumption, then power consumption decreases, but write margin and reliability deteriorate
Solution Approach 1:
The patent implements dynamic voltage boosting during write operations by activating a voltage boost circuit that temporarily raises the write signal voltage from the reduced operating voltage to a higher level. This dynamic adjustment allows the system to maintain low power consumption during normal operation while providing enhanced write capability when needed, resolving the contradiction between low power and reliable writes.
Solution Approach 2:
The patent changes the voltage parameter dynamically during write operations by introducing a voltage boost mechanism. The write signal voltage is changed from the reduced operating voltage to a boosted higher voltage during the write operation, enabling reliable writes at lower operating voltages without requiring continuous high voltage, thus maintaining low power consumption while improving write margin.
2Use of energy by stationary object
If operating voltage is reduced to achieve lower power consumption, then power consumption decreases, but read and write margins are reduced causing errors
Solution Approach 1:
The patent implements dynamic voltage boosting during write operations by activating a voltage boost circuit that temporarily raises the write signal voltage from the reduced operating voltage to a higher level. This dynamic adjustment allows the system to maintain low power consumption during normal operation while providing enhanced write capability when needed, resolving the contradiction between low power and reliable writes.
Solution Approach 2:
The patent changes the voltage parameter dynamically during write operations by introducing a voltage boost mechanism. The write signal voltage is changed from the reduced operating voltage to a boosted higher voltage during the write operation, enabling reliable writes at lower operating voltages without requiring continuous high voltage, thus maintaining low power consumption while improving write margin.
3Reliability
If voltage level shifting from VDD to VCS is implemented, then write reliability is improved, but device complexity increases
Solution Approach 1:
The patent introduces a voltage boost circuit as an intermediary component between the VDD domain and the VCS domain. This intermediary circuit performs the voltage level shifting function, translating signals from the lower VDD voltage to the higher VCS voltage required for reliable writes. By using a dedicated voltage boost circuit, the patent achieves reliable voltage translation while keeping the overall architecture manageable and modular.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability of SRAM write operations by maintaining the desired functionality while removing the need for a VDD supply, ensuring faster and more reliable writes, especially at low voltages and high temperatures.
Implementation Method 1
The electronic circuit translates a first write signal in a lower voltage domain to a second write signal in a higher voltage domain
Implementation Method 2
The electronic circuit controls a discharge of a voltage of a data write line to a ground voltage level
Implementation Method 3
The electronic circuit provides a negative voltage boost to the data write line after the voltage of the data write line has been discharged to reach or exceed a threshold value relative to the ground voltage level
Data Source
AI summary
An electronic circuit and a method for driving data writes to an SRAM bit cell in an electronic circuit. The electronic circuit translates a first write signal in a lower voltage domain to a second write signal in a higher voltage domain. Based, at least in part, on the second write signal, the electronic circuit controls a discharge of a voltage of a data write line to a ground voltage level. The electronic circuit provides a negative voltage boost to the data write line after the voltage of the data write line has been discharged to reach or exceed a threshold value relative to the ground voltage level.