SSD Loopback Diagnosis Bypassing NAND Access

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Solution Overview

Problem

Current SSD diagnosis methods require extensive data backup and restore processes, leading to increased latency and overhead, especially as storage capacity grows, due to the need for unmapped reads which are time-consuming and burdensome.

Innovation Solution

A special command is introduced to configure SSDs to loopback operational mode during PCIe link diagnosis, allowing latency measurement without accessing NANDs, thereby reducing latency and eliminating the need for data backup and restore processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional SSD diagnosis methods are used with data backup and restore processes, then comprehensive diagnosis can be performed, but latency increases and overhead increases

Engineering Contradiction:
Improvediagnosis comprehensivenessVSAvoiddiagnosis latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the essential diagnostic function from the traditional data access workflow by introducing a loopback mode that bypasses NAND access entirely. The operational mode switch separates the diagnostic path from the normal data access path, allowing diagnosis to be performed on the controller and interface without requiring actual data read/write operations to the storage medium.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The operational mode switch acts as an intermediary that redirects diagnostic commands to a loopback path instead of the normal data access path. This mediator component enables the system to perform comprehensive diagnostics including interface testing and controller functionality verification without the time-consuming overhead of actual NAND access and data backup/restore operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If data backup and restore processes are performed during diagnosis, then data integrity can be verified, but overhead increases significantly

Engineering Contradiction:
Improvedata integrity verificationVSAvoiddiagnosis overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the data integrity verification function from the complex backup/restore process by implementing integrity checks directly in the loopback mode. The system can verify data integrity through checksum validation and error detection codes during the diagnostic process itself, eliminating the need for separate backup and restore operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If unmapped reads are performed for diagnosis, then storage capacity can be tested, but latency increases and it becomes burdensome

Engineering Contradiction:
Improvestorage capacity testingVSAvoiddiagnosis efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the storage capacity testing function from the time-consuming unmapped read process by implementing capacity verification through metadata inspection and allocation table analysis in the loopback mode. The system can determine storage capacity and health status by examining the controller's internal data structures without actually reading from every storage location.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11211137B2Memory system with diagnose command and operating method thereof
Publication Date: 2021.12.28 SK HYNIX INC
  • US11211137B2 patent drawing
  • US11211137B2 patent drawing
  • US11211137B2 patent drawing

AI summary

A memory system and an operating method thereof include: at least a CPU configured to generate a special command; at least a PCIe link coupled with the CPU, wherein the PCIe link includes at least a PCIe switch; and a plurality of memory devices connected with the PCIe switch, wherein each of the plurality of memory devices includes a memory controller, an operational mode switch, and a plurality of memory components, and the operational mode switch is configured to perform a loopback from the memory controller corresponding to the special command at loopback operational mode.