SSD Package With Connection Substrate Cavity

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Solution Overview

Problem

The existing solid state drive (SSD) technology faces challenges in reducing size and minimizing development time and cost, as traditional SSDs are larger and more resource-intensive compared to hard disk drives.

Innovation Solution

The proposed SSD package design incorporates an integrated circuit substrate with a controller chip, buffer memory chip, and multiple memory chips connected via redistribution layers and a connection substrate, allowing for a compact and efficient configuration that reduces size and enhances memory capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If traditional SSD package design is used, then memory capacity can be achieved, but the size of the SSD package becomes large

Engineering Contradiction:
ImproveSSD package sizeVSAvoidmemory capacity
Core Design Contradiction:
Volume of moving objectVSQuantity of substance

Solution Approach 1:

The patent transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration by placing the controller chip and buffer memory chip vertically above the connection substrate. This vertical stacking enables multiple memory chips to be arranged in layers, significantly increasing storage capacity within a reduced footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The connection substrate with cavity structure allows the controller chip and buffer memory chip to be nested within the recessed area, creating a compact hierarchical arrangement where smaller components are positioned within the structural envelope of larger components, optimizing space utilization.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If more memory chips are added to increase capacity, then storage increases, but the package area expands

Engineering Contradiction:
Improvememory capacityVSAvoidpackage area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent resolves this contradiction by exploiting the third dimension (vertical height) to accommodate multiple memory chips in stacked layers rather than spreading them horizontally. The connection substrate's cavity structure and redistribution layers enable this vertical integration, allowing high capacity within a compact area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The package is segmented into functional layers: connection substrate at the base, controller chip and buffer memory chip in the cavity, and multiple memory chips stacked above. This segmentation allows independent optimization of each layer while achieving high overall density.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If complex connection structures are used to connect multiple chips, then functionality is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvechip connection functionalityVSAvoidconnection structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The connection substrate serves as an intermediary component that simplifies the connection architecture. It provides a centralized platform with cavity structures and redistribution layers that mediate between the controller chip, buffer memory chip, and multiple memory chips, reducing the need for complex direct interconnections between all components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The connection substrate performs multiple functions simultaneously: it provides mechanical support, electrical interconnection through redistribution layers, structural housing for the cavity, and alignment reference for chip placement. This multi-functionality reduces the need for additional specialized components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10109617B2Solid state drive package
Publication Date: 2018.10.23 SAMSUNG ELECTRONICS CO LTD
  • US10109617B2 patent drawing
  • US10109617B2 patent drawing
  • US10109617B2 patent drawing

AI summary

A solid state drive package is provided. The solid state drive package may include an integrated circuit substrate including: a lower redistribution layer; a first chip and a second chip provided on the lower redistribution layer; and a connection substrate provided on the lower redistribution layer, the connection substrate provided on an outer periphery of the first chip and the second chip; and a plurality of third chips provided on the integrated circuit substrate. The plurality of third chips are electrically connected to the first chip and the second chip via the connection substrate and the lower redistribution layer.