SSL Switch Material Segmentation for 3D NAND Memory
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Solution Overview
Problem
In 3D vertical-channel non-volatile memory (NVM) devices, the topmost string selection switch (SSL) switch experiences undesirable threshold-voltage shifts during programming/erasing processes, leading to increased power consumption and reduced operation efficiency due to the need for additional control circuitry to compensate for these shifts.
Innovation Solution
A memory device and method where the SSL switch is independently formed with a second channel layer, a gate dielectric layer, and a gate, using materials different from the charge-trapping layer, eliminating the need for additional circuitry to manage threshold-voltage shifts by avoiding shared material composition with the memory cells string.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the SSL switch shares the charge-trapping layer with memory cells, then the device structure is simplified, but the SSL switch experiences undesirable threshold-voltage shifts during programming/erasing processes
Solution Approach 1:
The invention segments the charge-trapping layer into two distinct parts: a first charge-trapping layer for memory cells and a second charge-trapping layer for the SSL switch. This segmentation prevents the SSL switch from experiencing threshold-voltage shifts during programming/erasing operations while maintaining a relatively simple overall device structure.
Solution Approach 2:
The invention applies different charge-trapping layer configurations to different regions of the device. The memory cell region uses a first charge-trapping layer, while the SSL switch region uses a second charge-trapping layer. This local differentiation allows each component to have optimized properties for its specific function.
2Reliability
If additional control circuitry is added to compensate for SSL switch threshold-voltage shifts, then the threshold-voltage stability is improved, but the power consumption increases and operation efficiency declines
Solution Approach 1:
The invention extracts the charge-trapping layer function from the SSL switch by providing a separate second charge-trapping layer that is not involved in programming/erasing operations. This eliminates the need for additional control circuitry to compensate for threshold-voltage shifts, thereby reducing power consumption and improving operation efficiency.
3Ease of manufacture
If the SSL switch is formed with the same material as the charge-trapping layer, then the manufacturing process is simplified, but the SSL switch cannot avoid being charged during programming/erasing processes
Solution Approach 1:
The invention segments the charge-trapping layer into distinct first and second layers with different material compositions. The first charge-trapping layer is used for memory cells while the second charge-trapping layer is used for the SSL switch, preventing the SSL switch from being charged during programming/erasing processes.
Solution Approach 2:
The invention applies different material compositions to different charge-trapping layers based on their specific functions. The first charge-trapping layer has properties suitable for memory cell operation, while the second charge-trapping layer has properties that prevent charging during programming/erasing operations.
Data Source
AI summary
A memory device memory device includes a multi-layers stack, a charge-trapping layer, a first channel layer and a SSL switch. The multi-layers stack includes a plurality of insulating layers, a plurality of conductive layers alternatively stacked with the insulating layers and at least one first through opening passing through the conductive layers. The charge-trapping layer blankets over a sidewall of the first through opening. The first channel layer is disposed in the first through opening. The SSL switch is disposed on the multi-layers stack and includes a second channel layer, a gate dielectric layer and a gate. The second channel layer is disposed on and electrically contacting to the first channel layer. The gate dielectric layer is disposed on the second channel layer and made of a material other than that for making the charge-trapping layer. The gate is disposed on the gate dielectric layer.