SSOI-Based GAA Transistor Strain Propagation
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Solution Overview
Problem
Scaling down field-effect transistors to achieve faster circuit operation has resulted in challenges in introducing strain in nanoribbon or nanowire semiconductor bodies, particularly in gate-all-around transistors, which affects carrier mobility and performance.
Innovation Solution
The formation of strained semiconductor on insulator (SSOI) bases with biaxial tensile strain in nanoribbons or nanosheets, achieved through lattice matching and etching processes, where the strain is propagated from the SSOI base to the channel materials, and maintained by source and drain regions, allowing for improved carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If scaling down field-effect transistors to achieve faster circuit operation, then speed is improved, but introducing strain in nanoribbon or nanowire semiconductor bodies becomes difficult
Solution Approach 1:
The patent applies preliminary action by forming the strained semiconductor layer on the insulator substrate before forming the nanoribbon channel structures. The SSOI base is prepared in advance with pre-established biaxial tensile strain, which is then propagated to the nanoribbons during subsequent processing steps, making strain introduction feasible at scaled dimensions
Solution Approach 2:
The patent uses the SSOI base as an intermediary structure that mediates between the substrate and the nanoribbon channels. The strained semiconductor layer on the insulator serves as a strain transfer medium, propagating biaxial tensile strain from the base to the channel materials through lattice matching, thereby enabling strain in the nanoribbons without direct manipulation of the channels themselves
2Reliability
If maintaining biaxial strain in nanoribbons to improve carrier mobility, then electrical conductivity is improved, but device structure becomes more complex
Solution Approach 1:
The patent merges the strain induction function into the SSOI base structure itself, combining the substrate, insulator, and strained semiconductor layer into a unified base that automatically provides biaxial tensile strain to all nanoribbon channels. This integration eliminates the need for separate strain induction mechanisms in each device, reducing overall structural complexity while maintaining high carrier mobility
Solution Approach 2:
The SSOI base serves multiple functions simultaneously: it provides mechanical support, electrical isolation through the insulator layer, and strain induction through the strained semiconductor layer. This multi-functionality reduces the need for additional components, simplifying the overall device structure while ensuring consistent biaxial strain across all nanoribbons for improved carrier mobility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility in the channel region, leading to improved performance of gate-all-around transistors by maintaining or inducing biaxial strain in nanoribbons, thereby improving transistor performance.
Implementation Method 1
the strain (e.g., biaxial tensile strain) from the strained silicon (Si) layer of the SSOI is propagated to the upper nanoribbons of the GAA transistor, e.g., because of lattice matching of the upper nanoribbons with the strained silicon layer of the SSOI
Implementation Method 2
A FET uses an electric field applied by the gate to control the electrical conductivity of a channel through which charge carriers (e.g., electrons or holes) flow between the source and drain
Data Source
Figure 1A~1B
Figure 1C
Figure 2A
AI summary
A gate-all-around transistor device includes a substrate, and a layer over the substrate, where the layer includes an insulator material. The device also includes a source region and a drain region, and a body that includes a semiconductor material over the layer and that laterally extends between the source and drain regions. In an example, the semiconductor material of the body is under biaxial tensile strain induced by an underlying strained semiconductor on insulator (SSOI) structure, in addition to any additional strain induced by the source and drain regions (if any). A gate structure is at least in part wrapped around the body, where the gate structure includes (i) a gate electrode and (ii) a gate dielectric between the body and the gate electrode. The body can be, for instance, a nanoribbon, nanosheet, or nanowire.