Nanoinformatics TRIZ Cases

An electron transport layer shields the cathode from oxygen and moisture, suppressing dark spot formation in flexible displays.

Stacked nanostructures in a gate all around transistor structure increase the process window and yield, reducing fabrication complexity in nanometer technology.

Anisotropic droplet spacing in ink jet coating compensates for uneven pressing forces, ensuring uniform residual layer thickness during pattern transfer.

A carbon nanotube diode structure directs electrostatic discharge current to ground through physical and electrical contact between p-type and n-type tubes.

Segmenting the deposited layer into a thick protective part and a thin visible part resolves the contradiction between protection and exposure accuracy.

An interconnect bridges laminated films in EUV exposure masks to maintain electrical conductivity across frame regions.

A W-state transmitter generates spatially entangled quantum states of light to probe reflective targets and decode messages.

Modified stamp patterns evacuate air from the interface, preventing defects during high-speed printing.

A P-type multilevel element uses a quantum well structure to achieve distinct threshold voltages for stable conductivity.

Segmenting mother templates into device and identification areas enables unique child template tracking without increasing manufacturing time or costs.

Block copolymer self-assembly creates nanoscale etching masks directly on graphene layers without external guides.

Scanning optical sensors detect template gratings to align substrates, resolving centering errors in nano-imprint lithography.

A non-planar exciton transistor uses stacked ballistic conductor layers and sidewall gates to reduce tunnel resistance.

A manufacturing process forms single gate dielectric layers within non-volatile memory regions while protecting field isolation structures.

Inner spacer modulation defines gate regions in nanosheet stacks to control work function metal thickness and presence near channel edges.

Phase-shifting material deposited above the EUV mask multilayer compensates for phase-shift differences caused by substrate defects.

A silicon nanowire thin film transistor structure with spaced source and drain electrodes on side portions of a central gate region.

Segmented air-gap inner spacers maintain electrical isolation between gate and source/drain regions, reducing parasitic capacitance during device scaling.

A multilayer reflective EUV exposure mask uses a 180° phase difference between reflected and absorbed light to enhance image contrast.

A metal film stimulates surface plasmon polaritons to detect electromagnetic energy incident angles.

A single radiation source provides actinic and inspection radiation, reducing apparatus size and cost while preventing unintended pattern fixation.

Filling seams between adjacent masters with a flush filler material eliminates pattern irregularities that degrade device efficiency in light guided panels.

Lutetium oxide and lanthanum aluminum oxide nanocrystals form a thin tunneling barrier via monolayer deposition.

A nanotube-based phase-change switch uses Joule heating to toggle amorphous and crystalline states.

Reactive gas modifies mesa sidewalls to remove extrusions while a platter protects the patterning surface from damage.

Two distinct spectral purity filters segment radiation wavelengths to maintain high EUV transmission and filter durability.

A nanotube field effect transistor uses a semiconducting fabric channel to modulate conductivity via gate control.

A carbon nanotube transparent conductive coating replaces rigid ITO layers on backside illuminated image sensors to maintain high electrical conductivity.

Reverse biasing the diode steering element limits current surge through the carbon storage element, preventing breakdown during programming.

Biaxial tensile strain propagates from SSOI bases to nanoribbons, enhancing carrier mobility despite manufacturing complexity.

Isotropic etching of sacrificial spacers creates curved source-drain surfaces to reduce leakage current in nanosheet transistors.

A magnetic head surface undergoes a chemical reaction to transform metallic layers into a chemically resistant form.

Symmetric beam flexures around optical flats minimize yaw error from thermal fluctuations, ensuring precise pattern replication.

Voltage-controlled electric fields shift magnetic domain walls in a nanowire, reducing power consumption from high drive currents.

All-around contacts surround nanowire source and drain regions to increase effective contact length, reducing resistance while maintaining high circuit density.

Anisotropic carbon nanotube sheets replace rigid metal traces to provide durability and polarization selectivity in wearable RF systems.

Nanoscale islands and dielectric materials enhance charging energy in single electron transistors, maintaining charge sensitivity at higher temperatures.

Merging interfacial and high-K dielectric layers between nanowires eliminates inner spacers, preventing defects in source/drain epitaxial layers.

Applying a separation force to the template while controlling substrate strain minimizes damage to recorded patterns and preserves alignment integrity.

Controlling the polymerization reaction rate above the gas generation rate reduces release force and minimizes bubbling defects in patterned films.

A protrusion narrows the phase change material width to increase electrical resistance, reducing programming power consumption for advanced CMOS nodes.

Charge neutral quantum confined semiconductor nanoparticles enhance photoluminescent efficiency through light flux treatment.

Plasmonic nanoparticles scatter measurement radiation to detect contaminating layer properties on EUV optical surfaces.

Gate carbon nanotubes manage resonance interaction between photonic elements by adjusting phase alignment, enabling dynamic signal modulation.

Direct photolithographic patterning creates a unified chemical and graphoepitaxy template, reducing process complexity while maintaining low defectivity.

Photo-decomposable agents pattern radiation sensitive layers to guide block copolymer self-assembly, overcoming 25 nm photolithography limits.

Asymmetric gate heights allow full silicidation of the select gate while protecting nanocrystals from etching damage.

Circular mold substrate with controlled thickness variation reduces pattern misalignment by maintaining parallelism between the mold and recipient substrate.