SST Transmit Driver Architecture for Low Jitter and Supply Noise

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Solution Overview

Problem

High-speed serial link standards impose stringent requirements on transmit driver performance, including low Bit Error Rates and tight jitter specifications, while existing architectures like CML and H-bridge drivers face challenges with power consumption, return loss, and sensitivity to supply noise.

Innovation Solution

A novel source-series-terminated (SST) transmit driver architecture with low supply sensitivity and output jitter is introduced, featuring an on-chip regulator for improved swing and jitter performance, a ripple-reduction technique to minimize self-induced noise, and a termination calibration method insensitive to mismatch, along with increased slew rate and placement of the final 2-to-1 MUX within the driver for reduced jitter and supply sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CML driver architecture is used, then return loss performance is improved, but power consumption increases

Engineering Contradiction:
Improvereturn loss performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The driver output stage is segmented into multiple parallel slices (e.g., 32 slices), where each slice contributes a portion of the total drive strength. This segmentation allows the driver to achieve the required return loss performance through the combined effect of multiple smaller transistors while maintaining lower individual power consumption per slice, thereby resolving the contradiction between return loss performance and power consumption.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If H-bridge driver architecture is used, then power consumption is reduced, but return loss performance deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidreturn loss performance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent merges multiple H-bridge-like slices in parallel to achieve the required return loss performance. Each slice operates with low power consumption characteristic of H-bridge architecture, but the combined effect of 32 parallel slices achieves the superior return loss performance typically associated with CML architecture, thereby resolving the contradiction between power consumption and return loss performance.

Inventive Principle:
Principle #5Merging (Combining)

3Use of energy by moving object

If traditional SST driver is used, then power consumption is low, but sensitivity to supply noise increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsensitivity to supply noise
Core Design Contradiction:
Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The supply noise sensitivity is reduced by segmenting the driver into 32 parallel slices, where the noise from each slice is distributed and averaged out. This segmentation approach maintains the low power consumption of individual slices while the combined output exhibits reduced sensitivity to supply noise, resolving the contradiction between power consumption and supply noise sensitivity.

Inventive Principle:
Principle #1Segmentation

4Productivity

If data rate is increased above 14 Gb/s, then bandwidth is improved, but deterministic jitter increases

Engineering Contradiction:
Improvedata rateVSAvoiddeterministic jitter
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic control of the driver output by using a 2-to-1 MUX that selects between different slice combinations based on the data pattern. This dynamic adaptation allows the driver to optimize its output characteristics for different data rates, maintaining low deterministic jitter even at data rates above 14 Gb/s while achieving the required bandwidth, thereby resolving the contradiction between data rate and deterministic jitter.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8878568B1High-speed SSR transmit driver
Publication Date: 2014.11.04 CADENCE DESIGN SYST INC
  • US8878568B1 patent drawing
  • US8878568B1 patent drawing
  • US8878568B1 patent drawing

AI summary

A high speed transmit driver is provided, along with methods to improve driver slew rate, decrease transmit jitter, improve termination accuracy, and decrease sensitivity to supply noise.