STI Divot Elimination via Stress-Inducing Silicon Nitride Hardmask
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Solution Overview
Problem
Conventional semiconductor device fabrication processes using shallow trench isolation (STI) technology result in divots that can lead to metal gate erosion, high leakage, and unsatisfactory performance, particularly in advanced process nodes like 32 nm or 28 nm, due to the formation of surface defects during etching and c-SiGe epitaxial growth.
Innovation Solution
An enhanced fabrication method that forms isolation recesses in semiconductor devices using stress-inducing silicon nitride material, which eliminates STI divots by selectively etching oxide material without damaging the semiconductor material, and grows epitaxial silicon germanium without introducing surface defects, thereby improving the performance of HKMG CMOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional shallow trench isolation (STI) technology is used, then isolation regions are formed, but divots are created at the STI-silicon interface causing surface defects
Solution Approach 1:
The isolation formation process is segmented into multiple steps: forming isolation recesses, filling with stress-inducing silicon nitride material, and selective oxide removal. This segmentation allows each step to be optimized independently, eliminating divots while maintaining isolation functionality.
Solution Approach 2:
The patent changes the material parameter from conventional oxide isolation to stress-inducing silicon nitride material, and modifies the process parameters by implementing selective etching sequences. This changes the physical and chemical properties of the isolation structure, eliminating surface defects while providing mechanical stress benefits.
2Ease of operation
If oxide material is etched away to expose semiconductor material, then isolation material protrudes above semiconductor material, but selective etching control is required to avoid damaging semiconductor material
Solution Approach 1:
An oxide hardmask layer is introduced as an intermediary between the isolation material and the semiconductor material. This hardmask serves as a protective mediator during selective etching operations, allowing the oxide isolation material to be removed while the semiconductor material remains protected, ensuring high reliability.
Solution Approach 2:
The oxide hardmask is formed in advance before the selective etching of isolation material. This preliminary action prepares the structure for subsequent selective removal operations, ensuring that the semiconductor material is protected from damage during the etching process.
3Reliability
If epitaxial silicon germanium is grown to improve transistor performance, then mobility is enhanced, but surface defects from divots can be incorporated into the epitaxial layer
Solution Approach 1:
The patent converts the potentially harmful effect of divots into a benefit by using stress-inducing silicon nitride material in the isolation regions. This material provides mechanical stress that enhances carrier mobility in the channel, turning what could be a defect source into a performance enhancement mechanism.
Solution Approach 2:
The patent changes the epitaxial growth conditions and the isolation material properties to ensure that high-quality epitaxial silicon germanium can be grown without incorporating divot defects. By eliminating divots through the new isolation formation process, the epitaxial layer quality is improved while maintaining the mobility-enhancing benefits of silicon germanium growth.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively eliminates STI divots, reduces surface defects, and enhances the performance of CMOS transistors by using stress-inducing silicon nitride to improve mechanical stress distribution, leading to improved transistor mobility and reduced leakage.
Implementation Method 1
oxidizing the exposed semiconductor material to form an oxide hardmask overlying the semiconductor material
Implementation Method 2
epitaxial material is selectively grown overlying the exposed section of the semiconductor material
Data Source
AI summary
A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method begins by forming an isolation recess by removing a portion of the silicon dioxide and a portion of the silicon. The isolation recess is filled with stress-inducing silicon nitride and, thereafter, the silicon dioxide is removed such that the stress-inducing silicon nitride protrudes above the silicon. Next, the exposed silicon is thermally oxidized to form silicon dioxide hardmask material overlying the silicon. Thereafter, a first portion of the silicon dioxide hardmask material is removed to reveal an accessible surface of the silicon, while leaving a second portion of the silicon dioxide hardmask material intact. Next, silicon germanium is epitaxially grown from the accessible surface of the silicon.