Stabilizing Pulses for Programmable Resistance Memory Retention
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Solution Overview
Problem
Programmable resistance nonvolatile memory cells often fail to retain their programmed data states due to spontaneous changes in resistance, leading to sensing errors and the need for narrower sensing margins, which can be costly and impractical.
Innovation Solution
A method involving iterative programming and verification cycles, followed by the application of a stabilizing pulse with the same polarity as the programming pulse, where the amplitude and pulse width of the stabilizing pulse are adjusted based on the previous iteration's success, to ensure the resistance of the programmable element remains within the target range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If iterative programming with increased pulse amplitude is used to program memory cells, then the resistance can be switched between target ranges, but some cells may still undergo spontaneous resistance changes after verification causing data retention failures
Solution Approach 1:
A stabilizing pulse is applied immediately after the programming pulse and verification step to prevent spontaneous resistance changes before they can occur. This preliminary stabilization action ensures that the resistance state is locked in place, preventing subsequent drift or switching that would cause data retention failures.
Solution Approach 2:
The verification step provides feedback about whether the resistance is within the target range, and based on this feedback, a stabilizing pulse is applied to cells that need it. This feedback-driven approach allows the system to adaptively stabilize only those cells that showed signs of instability, improving reliability without unnecessarily complicating the programming of already-stable cells.
2Reliability
If the sensing margin is narrowed to account for spontaneous resistance changes, then data retention can be maintained, but the cost and complexity of the memory system increases
Solution Approach 1:
Instead of accepting spontaneous resistance changes as an inevitable harm that requires narrower sensing margins and more expensive error correction, the patent converts this harmful effect into a beneficial one by applying a stabilizing pulse that actively prevents the resistance change. This transforms the potential failure mode into a controlled, preventable event, eliminating the need for costly design compromises.
3Reliability
If a stabilizing pulse is applied after verification to improve retention, then spontaneous resistance changes are reduced, but additional programming time is required
Solution Approach 1:
The stabilizing pulse is applied only to memory cells that fail the verification step or show signs of instability, rather than to all cells universally. This partial application approach ensures that stabilization is provided where needed while minimizing unnecessary time expenditure on cells that are already stable, thus reducing the overall time penalty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the retention of programmed data states by reducing spontaneous resistance changes, thereby maintaining a wider sensing margin and minimizing errors, making the memory cells more reliable and cost-effective.
Implementation Method 1
programmable resistance nonvolatile memory utilizes a memory material, such as a metal oxide material, which changes resistance between two or more stable resistance ranges by application of electrical pulses
Data Source
AI summary
A method to program a programmable resistance memory cell includes performing one or more iterations until a verifying passes. The iterations include a) applying a programming pulse to the memory cell, and, b) after applying the programming pulse, verifying if the resistance of the memory cell is in a target resistance range. After an iteration of the one or more iterations in which the verifying passes, c) a stabilizing pulse with a polarity the same as the programming pulse is applied to the memory cell. After applying the stabilizing pulse, a second verifying determines if the resistance of the programmable element is in the target resistance range. Iterations comprising steps a), b), c), and d) are performed until the second verifying passes. Methods and apparatus are described to program a plurality of such cells, including applying a stabilizing pulse of the same polarity after programming.