Stacked Beam-Deflection Electrode Layout for Semiconductor Chips
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Solution Overview
Problem
In multi-beam charged particle beam apparatuses, the deflection of electron beams is limited by the height of electrodes, making it difficult to achieve sufficient deflection while maintaining manufacturing feasibility, and overlapping bonding pads on semiconductor chips complicates electrical connections.
Innovation Solution
The semiconductor device employs two chips with electrodes arranged in a non-symmetrical pattern to double the electrode height and facilitate easy electrical connection by positioning pads to avoid overlap, using wires or bumps for connection, and optimizing electrode patterns to suppress pattern distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrode height is increased to improve electron beam deflection, then deflection efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The electrode structure is divided into two separate chips (first chip and second chip), each containing a subset of electrodes. This segmentation allows the electrodes to be manufactured on standard-sized chips with feasible fabrication processes, while the stacked configuration of the two chips effectively doubles the electrode height to improve electron beam deflection efficiency.
Solution Approach 2:
The solution transitions from a single-plane electrode arrangement to a three-dimensional stacked configuration. By stacking the first chip and second chip vertically, the electrode height is doubled without increasing the lateral footprint, thereby improving deflection efficiency while maintaining manufacturing feasibility through standard chip fabrication processes.
2Reliability
If bonding pads are positioned for electrical connection, then electrical connectivity is achieved, but pad overlap occurs complicating connections
Solution Approach 1:
The bonding pads on the first chip and second chip are positioned asymmetrically relative to each other. The first bonding pads and second bonding pads are arranged so that they do not overlap when the chips are stacked, simplifying the wire bonding or bump connection process and reducing manufacturing complexity while ensuring reliable electrical connections.
3Ease of manufacture
If electrode patterns are arranged symmetrically, then manufacturing is simplified, but pattern distortion occurs
Solution Approach 1:
The electrode patterns on the first chip and second chip are deliberately arranged in non-symmetrical configurations. This asymmetry in the stacked arrangement suppresses pattern distortion of the electron beams while still allowing for feasible manufacturing processes on individual chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electron beam deflection efficiency and simplifies the mounting process by preventing pad overlap, allowing for stable and efficient electrical connections in semiconductor devices.
Implementation Method 1
a plurality of first electrodes provided on the first substrate surface so as to be adjacent to the first through holes... a plurality of third electrodes provided on the fourth substrate surface so as to be adjacent to the second through holes... The first electrodes are a first pair of electrodes for deflecting the charged particle beams... The third electrodes are a second pair of electrodes for deflecting the charged particle beams
Data Source
AI summary
A semiconductor device includes: a first chip having a first substrate surface, a second substrate surface provided on a side opposite to the first substrate surface, and a plurality of first through holes, a plurality of charged particle beams passing through the first through holes; a second chip provided on the first chip and having a third substrate surface facing the second substrate surface, a fourth substrate surface, and a plurality of second through holes provided on the first through holes, the charged particle beams passing through the second through holes; a plurality of first electrodes provided on the first substrate surface so as to be adjacent to the first through holes; a plurality of second electrodes provided on the first substrate surface; a plurality of third electrodes provided on the fourth substrate surface so as to be adjacent to the second through holes; and a plurality of fourth electrodes provided on the fourth substrate surface, wherein the first electrodes are a first pair of electrodes for deflecting the charged particle beams, the third electrodes are a second pair of electrodes for deflecting the charged particle beams, the second electrode and the fourth electrode are an additional electrode pattern other than the first pair of electrodes and the second pair of electrodes for deflecting the charged particle beams, and an electrode pattern formed by the first electrode and the second electrode on the first substrate surface and an electrode pattern formed by the third electrode and the fourth electrode on the fourth substrate surface are not symmetrical with respect to opposite substrate surfaces of the two chips.