Stacked Betavoltaic Cell Layout Without Through-Via Interconnects

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Solution Overview

Problem

Existing betavoltaic devices face challenges in achieving high power density and efficiency due to the use of volumetrically inefficient interconnect components like through-vias, conductive traces, and insulators, which reduce active area and increase manufacturing costs, and are not conducive to compact, cost-effective series and parallel connections of betavoltaic cells.

Innovation Solution

The implementation of bi-polar contacts on both the front and back surfaces of betavoltaic cells, allowing for stacked configurations without interposers or through-vias, enabling efficient series and parallel connections in a compact form factor, thereby maximizing power density and reducing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional interconnect components (through-vias, conductive traces, insulators) are used to connect betavoltaic cells, then electrical connections can be established, but the active area is reduced and manufacturing costs increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidactive area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent removes conventional interconnect components (through-vias, conductive traces, insulators) from the betavoltaic cell structure. By extracting these unnecessary elements, the active area is maximized while electrical connections are achieved through direct contact between semiconductor junctions in stacked configurations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the functions of interconnection and structural support into the semiconductor substrate itself. Multiple betavoltaic cells are stacked and connected through direct semiconductor-to-semiconductor contact, eliminating the need for separate interconnect components and reducing the overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If through-vias are used for interconnection, then electrical connections are established, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidinterconnection structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates through-vias from the device architecture. Instead of creating complex via structures that extend through the substrate, the invention uses planar semiconductor surfaces for direct contact, dramatically simplifying the manufacturing process and reducing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical through-via interconnection system with a direct semiconductor junction contact system. This substitution eliminates the need for complex via formation processes (drilling, plating, etching) and uses the inherent electrical properties of semiconductor materials for interconnection.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Object-affected harmful factors

If low-energy beta emitting radioisotopes are used, then radiation safety is improved, but power density decreases

Engineering Contradiction:
Improveradiation safetyVSAvoidpower density
Core Design Contradiction:
Object-affected harmful factorsVSPower

Solution Approach 1:

The patent transitions from planar to three-dimensional stacked configurations of betavoltaic cells. By stacking multiple cells vertically and connecting them through direct contact, the power density is increased without requiring higher energy radioisotopes, thus maintaining radiation safety while achieving higher power output.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses composite structures combining multiple semiconductor materials (e.g., silicon, germanium, III-V compounds) with different radioisotopes in stacked configurations. This allows optimization of each cell's characteristics and achieves high power density through material composition rather than relying solely on high-energy isotopes.

Inventive Principle:
Principle #40Composite materials

4Power

If compact stacked configurations are implemented, then power density increases, but interconnection efficiency becomes challenging

Engineering Contradiction:
Improvepower densityVSAvoidinterconnection efficiency
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent merges the interconnection function into the stacking process itself. By designing cells with contact surfaces that directly engage when stacked, the interconnection is achieved as a natural consequence of the compact configuration, eliminating the need for separate interconnection steps and simplifying manufacturing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables the stacked cell structure to self-connect through direct semiconductor contact. The cells are designed with complementary contact surfaces that automatically form electrical connections when stacked, reducing the need for external interconnection components and simplifying the manufacturing process.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the creation of high-power, high-energy density betavoltaic devices with improved tunability of voltage and current, while minimizing the use of unnecessary materials and reducing the shadowing effect of contacts on the radioactive source, leading to more efficient and cost-effective power generation.

Implementation Method 1

the direct conversion of radioisotope beta (electron) emissions into usable electrical power via beta emissions directly impinging on a semiconductor junction device

Methodology Applied
Scientific EffectBeta emissions: Radioactive Decay

Implementation Method 2

Incident beta particles absorbed in a semiconductor create electron-hole-pairs (EHPs) that are accelerated by the built-in field to device terminals

Methodology Applied
Scientific EffectElectron-hole pair creation: Photoelectric Effect

Implementation Method 3

These direct conversion devices promise to deliver consistent long-term power for decadal time periods

Methodology Applied
Scientific EffectDirect conversion: Betavoltaics

Implementation Method 4

a first radioisotope source configured to emit alpha particles that directly impinge on a first semiconductor junction

Methodology Applied
Scientific EffectAlpha emissions: Radioactive Decay

Implementation Method 5

a second radioisotope source configured to emit gamma rays that directly impinge on a second semiconductor junction

Methodology Applied
Scientific EffectGamma emissions: Radioactive Decay

Data Source

PatentUS11875907B2Series and/or parallel connected alpha, beta, and gamma voltaic cell devices
Publication Date: 2024.01.16 CITY LABS INC
  • US11875907B2 patent drawing
  • US11875907B2 patent drawing
  • US11875907B2 patent drawing

AI summary

A device for producing electricity. The device includes a substrate having spaced apart first and second surfaces and doped a first dopant type, first semiconductor material layers disposed atop the first substrate surface and doped the first dopant type, and second semiconductor material layers disposed atop the first semiconductor material layers and doped a second dopant type. A first contact is in electrical contact with the second substrate surface or in electrical contact with one of the first semiconductor material layers. A beta particle source emits beta particles that penetrate into the semiconductor material layers; the beta particle source is proximate the uppermost layer of the second plurality of semiconductor material layers. A second contact is in electrical contact with one of the second plurality of semiconductor material layers. In one embodiment, bi-polar contacts (the first and second contacts) are co-located on each major face of the device.