Stacked cDIMM Compression Connectors for Dense PCB Memory Routing
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Solution Overview
Problem
Existing information handling systems face inefficiencies in memory capacity and speed due to the use of Small Outline Dual In-Line Memory Modules (SODIMMs), which result in congested PCBs, higher power consumption, and limitations in data transfer rates, particularly in systems requiring higher memory capacity but lower speeds.
Innovation Solution
The implementation of Compression Dual In-Line Memory Modules (cDIMMs) with z-axis compression connectors that provide a stand-off from the PCB, allowing for surface contact connections and mechanical alignment mechanisms, enabling efficient memory channel routing and higher data transfer rates while reducing PCB congestion and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If SODIMMs are used in existing information handling systems, then memory capacity can be increased, but PCB congestion increases and data transfer rates are limited
Solution Approach 1:
The patent transitions from planar memory module placement (x-y plane) to vertical stacking in the z-axis dimension. cDIMMs are stacked vertically using z-axis compression connectors, allowing multiple memory modules to occupy the same PCB footprint area. This dimensional change resolves the contradiction by enabling increased memory capacity without increasing PCB congestion, as the vertical stacking utilizes the third dimension rather than expanding the planar footprint.
2Quantity of substance
If SODIMMs are used to increase memory capacity, then more memory can be installed, but power consumption increases
Solution Approach 1:
By stacking memory modules vertically in the z-axis, the patent enables higher memory capacity within the same power envelope. The vertical architecture reduces the number of memory modules needed to achieve a given capacity, thereby reducing total power consumption compared to adding more planar SODIMMs that would each consume additional power.
3Quantity of substance
If SODIMMs are used, then memory can be installed, but data transfer rates are limited
Solution Approach 1:
The vertical stacking architecture enables shorter signal paths and more direct routing between the processor and stacked memory modules. The z-axis compression connectors provide optimized electrical pathways that reduce signal attenuation and interference, enabling higher data transfer rates compared to the longer, more congested signal paths required by planar SODIMM arrangements.
4Quantity of substance
If multiple memory modules are stacked vertically, then memory capacity increases, but mechanical alignment and connection complexity increases
Solution Approach 1:
The patent extracts the alignment and connection functions into dedicated z-axis compression connectors that are pre-integrated with the PCB. These connectors include built-in alignment features and compression mechanisms that simplify the stacking process. By separating the connection function into specialized components rather than requiring direct module-to-PCB connections, the system achieves vertical stacking with reduced mechanical alignment complexity.
Solution Approach 2:
The z-axis compression connectors serve as intermediary components between the PCB and stacked memory modules. These connectors provide standardized interfaces with alignment features that guide module placement and compression mechanisms that secure connections. The intermediaries simplify the overall stacking process by providing uniform connection points rather than requiring custom alignment solutions for each memory module.
Data Source
AI summary
An information handling system includes a first z-axis compression connector having a first depth, a first memory module, a second z-axis compression connector having a second depth that is greater than the first depth, a second memory module, and a printed circuit board. A first side of the first compression connector is affixed to the printed circuit board at a first location and a first surface of a first memory circuit board of the first memory module is affixed to a second side of the first compression connector. A first side of the second compression connector is affixed to the printed circuit board at a second location adjacent to the first location and the first side of a second memory circuit board of the second memory module is affixed to a second side of the second compression connector.