Stacked cDIMM Compression Connectors for Simpler PCB Routing

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Solution Overview

Problem

Existing information handling systems face inefficiencies in memory module configuration, leading to higher power consumption, lower speeds, and increased PCB complexity due to the use of Small Outline Dual In-Line Memory Modules (SODIMMs), which result in congested trace routes and higher layer counts on printed circuit boards.

Innovation Solution

The implementation of Compression Dual In-Line Memory Modules (cDIMMs) with z-axis compression connectors that provide a stand-off from the PCB, allowing for surface contact connections that are compressed to engage with metal contact elements, reducing the need for signal trace crossings and enabling higher speed operations while maintaining memory capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SODIMMs are used for memory configuration, then memory capacity can be achieved, but power consumption increases and speeds decrease

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent transitions from traditional planar memory module placement to a three-dimensional stacked configuration using z-axis compression connectors. This vertical stacking approach reduces signal trace lengths and eliminates trace crossings, thereby increasing data transfer speeds and reducing power consumption associated with signal transmission across the PCB.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention extracts memory modules from the traditional PCB plane and positions them vertically above the processor using z-axis connectors. This separation removes the memory modules from the congested PCB trace routes, reducing electrical interference and power consumption while improving signal integrity and transfer rates.

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If SODIMMs are used for memory configuration, then memory capacity can be achieved, but PCB complexity increases due to congested trace routes and higher layer counts

Engineering Contradiction:
ImprovePCB complexityVSAvoidPCB real estate
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

By moving memory modules to the z-axis vertical dimension above the processor, the patent eliminates the need for extensive PCB trace routing and multiple layers. This dimensional shift simplifies PCB design, reduces the number of required PCB layers, and frees up valuable PCB real estate while maintaining full memory capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If z-axis compression connectors with greater depth are used, then stacking capability is improved, but connector depth varies requiring different configurations

Engineering Contradiction:
Improvestacking capabilityVSAvoidconnector configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the memory system into modular units with standardized z-axis compression connectors. Each connector is designed with consistent dimensions and mounting characteristics, allowing memory modules to be stacked in various configurations (single module, dual module, quad module) using the same connector type. This segmentation enables adaptability while maintaining connector uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The z-axis compression connector is designed as a universal interface that can accommodate different memory module configurations. The same connector design supports single modules, dual modules stacked vertically, and quad module arrangements, providing versatility in system configuration without requiring different connector types or increasing connector complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250006707A1System and method for stacking compression attached memory modules
Publication Date: 2025.01.02 DELL PROD LP
  • US20250006707A1 patent drawing
  • US20250006707A1 patent drawing
  • US20250006707A1 patent drawing

AI summary

An information handling system includes a first z-axis compression connector having a first depth, a first memory module, a second z-axis compression connector having a second depth that is greater than the first depth, a second memory module, and a printed circuit board. A first side of the first compression connector is affixed to the printed circuit board at a first location and a first surface of a first memory circuit board of the first memory module is affixed to a second side of the first compression connector. A first side of the second compression connector is affixed to the printed circuit board at a second location adjacent to the first location and the first side of a second memory circuit board of the second memory module is affixed to a second side of the second compression connector.