Stacked CFET Inductor Layout for Compact LC Oscillators
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Solution Overview
Problem
Integrated circuits (ICs) face challenges in minimizing the area occupied by LC oscillators due to the separate fabrication processes and layer configurations of front-side and back-side inductors, which can lead to increased size and complexity.
Innovation Solution
The integration of a complementary field-effect transistor (CFET) device with stacked transistors and both front-side and back-side inductors, where the front-side inductor is formed above the back-side inductor, reducing the overall area by sharing components and layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If separate fabrication processes are used for front-side and back-side inductors, then manufacturing flexibility is maintained, but the area occupied by the LC oscillator increases
Solution Approach 1:
The patent combines front-side and back-side inductor fabrication into a unified process where conductive layers are formed on both sides of the substrate simultaneously. The front-side inductor is formed in upper metal layers while the back-side inductor is formed in lower metal layers, with both processes integrated into the same fabrication sequence, thereby reducing the overall area while maintaining manufacturing feasibility
Solution Approach 2:
The patent utilizes the third dimension by forming inductors on both the front side and back side of the substrate. This vertical stacking approach allows the LC oscillator to occupy less planar area by extending the inductor structure into the vertical dimension, with the front-side inductor positioned above the back-side inductor through the substrate
2Area of stationary object
If inductors are placed on both sides of the substrate, then the LC oscillator area is reduced, but the integration complexity increases
Solution Approach 1:
The inductor structure is segmented into front-side and back-side components, with the front-side inductor formed in upper metal layers and the back-side inductor formed in lower metal layers. This segmentation allows each inductor to be optimized independently while maintaining compact integration, reducing the overall LC oscillator area without excessive manufacturing complexity
Solution Approach 2:
The substrate acts as an intermediary element that couples the front-side and back-side inductors. The conductive structures on both sides are positioned to overlap or align through the substrate, creating an integrated inductor system that achieves area reduction while managing integration complexity through the substrate's mediating role
Data Source
AI summary
An integrated circuit device includes a first-type transistor and a second-type transistor stacked with each other at a front side of a substrate. The second-type transistor is between the first-type transistor and the substrate. The integrated circuit device also includes a front-side inductor having one or more conductors in a front-side upper metal layer above both the first-type transistor and the second-type transistor, and a back-side inductor having one or more conductors in a back-side lower metal layer at a back side of the substrate. The front-side inductor, the first-type transistor, and the second-type transistor form a stack directly above the back-side inductor.