Stacked Chip Channel Swapping to Minimize Interface Signal Skew
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Solution Overview
Problem
In stacked semiconductor devices, signal transmission skew occurs due to the mismatched channel interfaces between base chips and core chips, leading to reduced operation reliability and bandwidth efficiency.
Innovation Solution
The implementation of a stacked semiconductor device with transfer control circuits that selectively swap channel commands and data words between pseudo-channels, using a mirror structure for channel interfaces on the base chip and a shift structure for core chips, ensures synchronized data transfer through through-electrodes, minimizing signal skew and enhancing operational reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If channel interfaces on base chip and core chips use different structures (mirror vs shift), then device integration and functionality are improved, but signal transmission skew increases and operation reliability decreases
Solution Approach 1:
A transfer control circuit is introduced as an intermediary component between the base chip and core chips. This circuit receives data from the base chip, performs selective swapping of data words based on channel designation signals, and transmits the swapped data to the appropriate core chip channels. The intermediary handles the structural mismatch between mirror and shift channel interfaces, enabling compatibility while maintaining signal integrity and minimizing skew.
2Device complexity
If data transfer between chips is performed without selective swapping, then device complexity is reduced, but signal skew increases and bandwidth efficiency decreases
Solution Approach 1:
The transfer control circuit implements dynamic data word swapping based on real-time channel designation signals. The circuit selectively swaps data words (e.g., swapping first and second data words) depending on which channel is being accessed, allowing the system to adapt its data transfer pattern to match the channel structure requirements. This dynamic approach optimizes bandwidth utilization while maintaining manageable complexity through conditional logic.
3Ease of operation
If channel commands are transmitted without selective swapping, then operation simplicity is improved, but signal synchronization deteriorates and operation reliability decreases
Solution Approach 1:
The transfer control circuit performs preliminary swapping of channel commands and data words before transmission to the core chip. By pre-processing the data according to the target channel structure (mirror or shift), the circuit ensures that the core chip receives correctly formatted signals that are already synchronized with its channel architecture. This preliminary action prevents synchronization issues and maintains operation reliability without complicating the overall control flow.
Data Source
AI summary
A stacked semiconductor device includes at least one upper chip including a plurality of channels each including first and second pseudo-channels; and a plurality of transfer control circuits respectively corresponding to the channels and each configured to output channel commands according to a channel designation signal designating one of the first and second pseudo-channels and a location information signal indicating a location of a corresponding channel of the channels, and transmit first and second data words between the corresponding channel and a lower chip according to the channel commands.