Stacked Semiconductor Chip ID Rotation Compensation
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Solution Overview
Problem
In stacked semiconductor devices, the rotation of semiconductor chips can lead to incorrect chip ID generation due to misalignment of transmission and reception terminals, causing separation and erroneous identification information.
Innovation Solution
The semiconductor device design includes first and second reception terminals arranged in point symmetry on a common rotation center, with identification information generated by converting received data using a bit-shifting method and outputting a bit sequence through second transmission terminals, effectively eliminating the influence of chip rotation on identification information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If semiconductor chips are rotated to improve heat dissipation, then heat dissipation characteristic is improved, but chip ID generation becomes incorrect due to terminal misalignment
Solution Approach 1:
The patent applies asymmetry by arranging first reception terminals and second reception terminals in different patterns (point symmetry vs. other symmetry) to create distinguishable terminal groups. This asymmetric arrangement allows the system to detect chip rotation state and apply appropriate conversion methods, thereby maintaining chip ID generation accuracy even when chips are rotated for heat dissipation improvement
Solution Approach 2:
The patent changes the parameter of terminal arrangement pattern to distinguish between different chip orientations. By having first reception terminals arranged in point symmetry and second reception terminals arranged in other symmetry, the system can identify rotation states and apply corresponding data conversion methods, resolving the conflict between rotation-based heat dissipation and accurate chip ID generation
2Ease of manufacture
If chip ID is generated by increment circuit to simplify manufacturing, then manufacturing cost is reduced, but chip rotation causes terminal misalignment and incorrect ID generation
Solution Approach 1:
The patent applies preliminary action by pre-arranging reception terminals in specific symmetric patterns during chip manufacturing. This preliminary terminal arrangement enables the chip to automatically adapt to rotation states through predetermined conversion methods, ensuring reliable chip ID generation without requiring complex real-time adjustment mechanisms, thus maintaining both manufacturing simplicity and ID correctness
Solution Approach 2:
The patent implements feedback by using the terminal arrangement pattern itself as a reference to detect chip rotation state. The system compares the received data pattern against the known terminal arrangement to determine if rotation occurred, then applies appropriate conversion to correct the chip ID generation, ensuring reliability while keeping the manufacturing process simple
Data Source
AI summary
A semiconductor device includes semiconductor chips stacked each other. Each of the semiconductor chips converts second reception data received by second reception terminals arranged in point symmetry on the first face by a conversion method to convert first reception data received by first reception terminals arranged in point symmetry on the first face into a reference data; and generates an identification information of the each semiconductor chip based upon the converted second reception data; and outputs the bit sequence obtained by converting the generated identification information by means of the inverse conversion method of the conversion method.