Stacked Semiconductor Chip Layout With Intermediate Through-Electrodes

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Solution Overview

Problem

The existing semiconductor apparatuses with multiple stacked chips face increased manufacturing costs when attempting to improve functionality by adding a third chip, as they require additional through-electrodes for connection, complicating the process and increasing expenses.

Innovation Solution

A semiconductor apparatus design featuring a light-receiving chip, a rewiring-side semiconductor chip with a wiring layer, an intermediate semiconductor chip with through-electrodes penetrating its substrate, and rewiring connecting these elements, along with an insulating film to reduce manufacturing complexity and costs, while maintaining or enhancing functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a third semiconductor chip is added to improve functionality, then the functionality of the semiconductor apparatus is improved, but the manufacturing cost increases due to the need for additional through-electrodes

Engineering Contradiction:
ImprovefunctionalityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent extracts the through-electrode formation process from the chip stacking process. By forming through-electrodes only in the intermediate semiconductor chip rather than in each stacked chip, the invention separates the connection function from the stacking structure, thereby reducing manufacturing complexity and cost while maintaining the ability to connect multiple chips including a third chip for improved functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The intermediate semiconductor chip serves multiple functions: it acts as a mechanical support substrate, provides electrical connection points via its through-electrodes, and enables connection to multiple stacked chips (at least two chips). This multi-functionality eliminates the need for separate through-electrode formation in each chip while still achieving the required electrical connections for improved functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If through-electrodes are formed in multiple chips to enable connection, then the electrical connection is achieved, but the device complexity increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidthrough-electrode structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the through-electrode formation requirement from the overall stacked chip structure, concentrating it solely in the intermediate semiconductor chip. This extraction simplifies the device structure by eliminating the need for through-electrodes in other chips while maintaining reliable electrical connections between all stacked chips

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The intermediate semiconductor chip acts as a mediator that provides the through-electrode connection function for the entire stacked chip assembly. Rather than requiring each chip to have its own through-electrodes, the intermediate chip serves as a central connection hub, reducing overall device complexity while ensuring reliable electrical connections

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230361146A1Semiconductor apparatus and semiconductor apparatus manufacturing method
Publication Date: 2023.11.09 SONY SEMICON SOLUTIONS CORP
  • US20230361146A1 patent drawing
  • US20230361146A1 patent drawing
  • US20230361146A1 patent drawing

AI summary

A semiconductor apparatus having multiple semiconductor chips stacked one on top of another improves functionality while reducing manufacturing costs.The semiconductor chips include a light-receiving chip, a rewiring-side semiconductor chip, an intermediate semiconductor chip, through-electrodes, and rewiring. The light-receiving chip receives incident light. A wiring layer is formed on a predetermined wiring surface of the rewiring-side semiconductor chip. One of a pair of bonding surfaces of the intermediate semiconductor chip is bonded to the light-receiving chip, and the other of the pair of bonding surfaces is bonded to the rewiring-side semiconductor chip. The through-electrodes penetrate a semiconductor substrate of the intermediate semiconductor chip. The rewiring is provided on the wiring surface in a manner connecting the through-electrodes with the wiring layer.