Stacked Die Integrated Circuit Without Redistribution Layer

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Solution Overview

Problem

Conventional 3D ICs face challenges with high costs associated with forming stacked die structures, particularly due to the complexity and cost of interconnects in current packaging technologies.

Innovation Solution

The solution involves a package substrate without a redistribution layer, where via structures extend from the lower to the upper surface, allowing direct coupling with a die having similar via structures, enabling a cost-effective 3D IC configuration by eliminating the need for a redistribution layer and optimizing interconnect pitch and density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional 3D IC packaging with redistribution layers is used, then interconnect functionality is achieved, but manufacturing cost increases and device complexity increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidpackaging structure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent removes the redistribution layer from the package substrate, extracting this component from the packaging structure. The die's own via structures directly interface with the package substrate's via structures, eliminating the need for the redistribution layer and reducing both manufacturing cost and structural complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the interconnect functions by allowing the die's via structures to directly couple with the package substrate's via structures. This consolidation eliminates intermediate layers and simplifies the overall packaging structure while maintaining electrical interconnection functionality.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If redistribution layer is eliminated, then manufacturing cost decreases and device complexity decreases, but interconnect routing flexibility may be reduced

Engineering Contradiction:
Improvepackaging structure complexityVSAvoidinterconnect routing flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by positioning via structures at specific locations on both the die and package substrate to match their respective pad layouts. This localized via structure arrangement provides the necessary interconnect routing flexibility without requiring a global redistribution layer, maintaining adaptability while simplifying the overall structure.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9991231B2Stacked die integrated circuit
Publication Date: 2018.06.05 ADEIA SEMICON TECH LLC
  • US9991231B2 patent drawing
  • US9991231B2 patent drawing
  • US9991231B2 patent drawing

AI summary

An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.